cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
Observer
Observer
1,050 Views
Registered: ‎03-08-2018

AXI Stream in Microblaze

Hi all,
I am creating a Micoblaze based  design in Vivado 2018.2 targetting Virtex Ultrascale FPGA. I want to use one AXI stream channel in Microblaze (one Master and one slave). Can anybody point me some example firmware code which use AXI stream interface?

I mainy need below information.

WIth M_AXI_DP port, I can use Xil_out32 and Xil_In32 functions to write and read 32 bit data from an Address. What are the equivalant finctions for AXI Stream transfers? Which file should I include to access those funcrions? (like xil_io.h)

 

2 Replies
Moderator
Moderator
979 Views
Registered: ‎03-25-2019

Hi @soccerchamp,

You can refer to this Wiki_article which contains a design that use Microblaze stream interface and an SDK demo project.
Also you can refer to this Forum_thread.

Best regards,
Abdallah
-------------------------------------------------------------------------------
Please don't forget to reply, kudo and accept as a solution
0 Kudos
Reply
Observer
Observer
953 Views
Registered: ‎03-08-2018

@abouassi 

Thanks for your reply. It really helped.

I have one more clarification. Is it possible to run the stream interface with a differnt clock with respect to microblaze clock?

Regards

Anoop

0 Kudos
Reply