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Participant zxm02370303
Participant
124 Views
Registered: ‎03-26-2013

vivado bfm mpsoc library simulation 64 bit address

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vivado bfm mpsoc library simulation write_data can't access 64 bit address, 

when use write_data(64'h400000000,4,32'h12345678,response);

the log said out of range.

i wonder if there is limitation on write_data usage or parameter width.

Thank you very much.

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Xilinx Employee
Xilinx Employee
59 Views
Registered: ‎01-09-2019

Re: vivado bfm mpsoc library simulation 64 bit address

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Hello @zxm02370303

The Zynq Ultrascale+ MPSoC Verification IP Documentation can be found here: https://www.xilinx.com/support/documentation/ip_documentation/zynq_ultra_ps_e_vip/v1_0/ds941-zynq-ultra-ps-e-vip.pdf

On page 7 it talks about the write_data function call which limits addresses to 32-bits.  For any questions about usage regarding the Verification IP API, the above document would probably be the best bet.

Thank you,

Caleb

Thanks,
Caleb
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Xilinx Employee
Xilinx Employee
60 Views
Registered: ‎01-09-2019

Re: vivado bfm mpsoc library simulation 64 bit address

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Hello @zxm02370303

The Zynq Ultrascale+ MPSoC Verification IP Documentation can be found here: https://www.xilinx.com/support/documentation/ip_documentation/zynq_ultra_ps_e_vip/v1_0/ds941-zynq-ultra-ps-e-vip.pdf

On page 7 it talks about the write_data function call which limits addresses to 32-bits.  For any questions about usage regarding the Verification IP API, the above document would probably be the best bet.

Thank you,

Caleb

Thanks,
Caleb
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