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International Field Programable Logic & Applications (FPL) Conference 2018 Recap

Xilinx Employee
Xilinx Employee
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Reported by Cathal McCabe, Xilinx University Program AE EMEA

 

We just finished 2018 Xilinx Developer Forum (XDF) Silicon Valley in San Jose, CA. XDF is a pivotal event for Xilinx because it connects developers to the deep expertise of Xilinx engineers, partners, and industry leaders. Before we give full coverage of 2018 XDF, let's recap what happened at the 2018 Field Programmable Logic & Applications (FPL) conference.

 

FPL is the world’s largest FPGA academic conference. FPL 2018, the 28th edition of the conference, was held in Trinity College Dublin, Ireland. FPL was the first and remains the largest conference covering the rapidly growing area of field-programmable logic and reconfigurable computing. During the past 27 years, many of the advances in reconfigurable system architectures, applications, embedded processors, design automation methods, and tools were first published in the proceedings of the FPL conference series. The conference brings together researchers and practitioners from both academia and industry from around the world.

 

Here are a few key highlights at FPL.

 

Xilinx Welcome Reception

The week began with a Xilinx welcome reception held in the prestigious Royal Irish academy building. Prof. Peter Kennedy from UCD and president of the RIA gave a talk on the Irish influence on the early communications revolution. 

 

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Figure 1. “Early Irish Contribution to the Information Revolution” at Xilinx FPL 2018 Welcome Reception

 

Attendees got to see demonstrations of a range of Xilinx technologies including 4K video mixing on Zynq UltraScale+ RFSoC using PYNQ, reduced precision LSTM for optical character recognition running on Zynq, the new RFSoC ZCU111 platform showing high-speed DAC and ADC capabilities, and accelerated machine learning using AWS.

 

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Figure 2. Zynq Ultrascale+ RFSoC Demonstration at the Xilinx FPL 2018 Welcome Reception

 

FPL Conference

The main conference was held over three days, with six keynote speakers, and two parallel paper tracks. There were over 260 registered attendees, with 236 paper submissions from over from 37 countries. Our own Michaela Blott, Principal Engineer and leader of the Xilinx research labs team in Ireland, was technical program co-chair. 

 

Keynotes

Brendan Farley, Vice President of Engineering at Xilinx gave a keynote on Implementing Software Defined Radios for 5G with Next-Generation FPGAs, which focused on the new Xilinx Zynq Ultrascale+ RFSoC.

  

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Figure 3.Implementing Software Defined Radios for 5G with Next-Generation FPGAs”

 

Vivienne Sze, Associate Professor at MIT, gave an excellent keynote on Energy-Efficient Edge Computing for AI-driven Applications, discussing techniques including energy aware pruning in neural networks. Dan Werthimer (UC Berkley), co-founder and chief scientist of the SETI@home project gave a keynote on “Searching for E.T. with FPGAs”. Dan talked about the importance of Xilinx technologies over the last 20 years to scientific instrumentation, from the original Virtex to the latest UltraScale+ devices and how Zynq UltraScale+ RFSoCs with integrated fast ADCs are ideal for future systems.

   

FPL Exhibition, Demo Night, and Tutorials

The Xilinx University Program had a booth at the FPL exhibition, where there was strong interest in the latest PYNQ supported platforms, the new PYNQ-Z2 board from TUL, featuring a Xilinx Zynq 7020 device, and the Zynq UltraScale+ ZCU104 board, which is now also supported by the PYNQ framework. www.pynq.io
A raffle was held each day at the Xilinx booth and three lucky winners each got to take home a new PYNQ-Z2 board.

 

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Figure 4. Hugo Andrade (XUP) and Michael Manske (FPL 2018 co-chair), Presenting One of the Winners with Their Prize of a PYNQ-Z2 Zynq Development Board

 

At FPL demo night, a team from University Strathclyde demonstrated generation and transmit of QPSK data on the new Xilinx ZCU111 RFSoC development platform using PYNQ. The PYNQ framework was used to control the demonstration and for visualization of the RF data in a Jupyter notebook. 

 

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Figure 5. University Strathclyde RFSoC Demo Using PYNQ on ZCU111

 

Cathal McCabe, Xilinx University Program (XUP), hosted two tutorials, one on developing applications for Xilinx EC2 F1, accelerated compute instances in the AWS cloud, and an introductory tutorial on PYNQ. 

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Figure 6. Cathal McCabe from XUP Giving a Tutorial on Using Xilinx AWS EC2 F1 Accelerated Compute Instances

 

 

What's next? 

We're going to cover what happened at 2018 XDF for the next few weeks. Stay tuned!