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MicroZed Chronicles: RFSoC Explorer

Xilinx Employee
Xilinx Employee
0 2 700

Editor’s Note: This content is republished from the MicroZed Chronicles, with permission from the author and Hackster.io.

 

How to prototype RFSoC solutions with the RFSoC Explorer and Matlab

To get started with the MicroZed Chronicles for the new year, I thought we would take a look at one of the more complex boards I have, the ZCU111 and the RFSoC.

More specifically we are going to look at the Avnet RFSoC Explorer. The Avnet RFSoC Explorer enables us to control the RF mixed signal converters in the RFSoC on the ZCU111 using Matlab.

Coupled with a Qorvo RF front end we can rapidly prototype RFSoC solutions directly from Matlab, pretty neat really!

 

RFSoC ExplorerRFSoC Explorer

To get started with the RFSoC Explorer prototyping we first need to set up the Avnet RFSoC Explorer in Matlab (We need Matlab version 2019B).

Once Matlab has started from the Add-On button we can search for and install the Avnet RFSoC Explorer add-on.

Adding in the Avnet RFSoC Explorer to MatlabAdding in the Avnet RFSoC Explorer to Matlab

To be able to access and control the hardware on the ZCU111 we need to also install the Communications Toolbox-Support Package for Xilinx Zynq based Radio.

Again this can be found under the Add-On Explorer by searching for communication toolbox support

Searching for the Communication Toolbox SupportSearching for the Communication Toolbox Support

Select the appropriate toolbox and select install

Installing the Communications ToolboxInstalling the Communications Toolbox

With the Matlab environment set up, we are now ready to configure the hardware and start working with the Avnet RFSoC Explorer.

The first thing we need to do is connect the Qorvo 2x2 RF Front End to the ZCU111 and download the Linux image for the RFSoC to be able to work with Avnet RF Explorer.

We can download the image for the SD Card here, copy these files to your SD Card and boot the ZCU111

All communication between the ZCU111 and Matlab uses a gigabit Ethernet link.

As such we need to know the IP address, therefore using a serial terminal issue the ifconfig command to determine the IP address

Determining the IP address of the ZCU111Determining the IP address of the ZCU111

We can also use the serial terminal to control the Qorvo RF front end, this enables us to control the low noise amplifier, power amplifier and attenuators.

The program we use to do this is started by typing, Qorvo in the serial terminal.

Running the Qorvo ProgramRunning the Qorvo Program

To prepare the Qorvo RF Front End for use we need to download the default configuration using this application (Select V in the Qorvo application).

We are now ready to start the Avnet RFSoC Explorer in Matlab, from the APPS menu select Avnet RFSoC Explorer.

Appp in MatlabAppp in Matlab

This wil launch the Avnet RFSoC Explorer

RFSoC ExplorerRFSoC Explorer

From the main tab we can enable and configure the DAC and ADC subsystem as we desire for our testing. Each DAC or ADC tile can be enabled by clicking the On/Off button, this will open a new tab for the tile configuration in detail.

For this simple example we are going to configure the ADC to sample at 1081.344 MSPS, and set ADC complex mixer to -1842 MHz. This will mean a signal present at 1843 MHz will appear be located at 1 MHz in the output spectrum.

 

Configuring the ADCConfiguring the ADC

With the ADC configured we need to generate a tone using the DACs.

To do this I enabled Tile 1 DAC and configured a sampling rate of 6389.76 MHz, and the complex mixer for a center-frequency of 1842 MHz.

Configuring the DACConfiguring the DAC

We can then use the ADC tile to capture and display samples from the DAC. You will notice the spectrum shows the CW tone at 1MHz as expected however, the amplitude is low.

327_Fig11.jpg

Using the Qorvo application in the serial terminal we can control the settings on the Digital Pre Distortion measurement path we are monitoring and TX attenuator until we receive a 0 dBFS signal at the ADC, increasing the power beyond this may damage the RF-ADC.

327_Fig12.jpg

The great thing about the RFSoC Explorer is we can generate signals in Matlab and then apply them to the RFSoC.

Lets wrap up looking at a LTE-4G signal, on the DAC tile setting from the signal source select wireless waveform.

This will open up the wireless waveform generator, using this waveform generator we can create a LTE-4G signal and transmit and receive it via the RFSoC.

LTE Signal GeneratedLTE Signal Generated

Capturing the signal again using the ADC will show the input spectrum and the LTE signal. However there is saturation of the PA which is causing some distortion.

LTE signal as receivedLTE signal as received

By adjusting the attenuation at the power amplifier we can clean up this signal.

LTE signalLTE signal

It is pretty easy to generate waveforms and verify the performance in the RFSoC using the RFSoC explorer.

I am going to be using the Avnet RFSoC Explorer for several projects I am working on at the moment!

 

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

Get the Code: ATaylorCEngFIET (Adam Taylor)

Access the MicroZed Chronicles Archives with over 300 articles on the FPGA / Zynq / Zynq MpSoC updated weekly at MicroZed Chronicles.

2 Comments
Contributor
Contributor

Hi Adam

 

Can we use the ZCU111 with the XM500 add-on card with the Avnet RFSoC explorer and MATLAB? 

Xilinx Employee
Xilinx Employee

Hi @arve9066, thank you for the comment. Please contact the author for the details. His email is adam@adiuvoengineering.com.