Editor’s Note: This content is republished from the MicroZed Chronicles, with permission from the author.
I recently came across a link to the Trenz ZynqBerry Zero. This is a Zynq Z-7010 device in the same form factor as the Raspberry Pi Zero. I liked the small size and its interfaces looked interesting so I ordered one from Trenz in order to take a closer look.
At first glance, I was surprised at just how small the board is. It measures less than 3 cm by 6.5 cm into a space that packs the following:
Zynq Z-7010 in a CLG225 Pin Package
512 MB of DDR3L (IS43TR16256BL125KBLI)
16 MB of QSPI Flash (S25FL127SABMFV10)
MIPI Connector – 2 Lane MIPI CSI Support
HAT-Compatible 40-Pin Header
SD Card Connector
USB Power, UART and JTAG (FT232H)
USB OTG (USB3320C-EZK)
After looking into the architecture of the board more, it is interesting to see how much has been implemented in such a small area.
In this column, I am going to start with looking at the power solution, which is a bit unusual for me. Typically power solutions can consume significant board area, especially when switching regulators are used because they require external MOSFETs and inductors. The ZynqBerry Zero uses the Intel Enpirion EP53A7xQI PowerSoC. These switching regulators include both the MOSFET and inductor while providing up to 1 A output current. The convertors are interesting because they are available in two flavors -- the EP53A7LQI and EP53A7HQI. Both of these devices provide a selectable output voltage depending on the state of three logic inputs which can be set via pull or down resistors. The ‘L’ version is the low voltage output and provides an output voltage between 0.8v and 1.5V. The ‘H’ version provides an output voltage between 1.8v and 3.3v. The ‘L’ version output voltage can also be set by an external resistor network. This is what the ZynqBerry Zero does to achieve the processor 1.0V and DDR 1.35V rails. If you are interested you can find the schematics here.
The architecture of the programmable logic and processing system is very sensible. The PL is connected to the HDMI and MIPI and provides most of the 40 pin GPIO break out. With the reduced number of MIO provided on the CLG225 package, the PS provides the QSPI, SD Card, and USB OTG connections along with the I2C channel, which can be switched to either the MIPI interface or the 40 pin connector. The I2C interface for the HDMI interface and the 40 pin connector UART output are connected to the PL. However, we can use the PS EMIO to route the PS I2C and UART to the PL if desired.
We can power and program the board using the USB power connector. This also provides UART and JTAG capabilities. The booting of the ZynqBerry Zero is interesting because the CLG225 package only provides 32 MIO pins compared to the 54 provided in other packages. This also means the primary boot mechanism is the QSPI memory since the SD Card is not supported for boot in the CLG225 package. In order for the SD Card to boot, MIO pins 40-45 must be used but these are not provided on the CLG225 MIO.
We can use QSPI for primary boot and the SD Card for secondary boot (e.g. containing the root filesystem of an embedded Linux OS).
One of the really cool things about the ZynqBerry Zero is that the PI HAT connector opens up a world of breakout boards. You could even try connecting a ZynqBerry Zero to a PI using the USB gadget configuration and the PI Cluster HAT to accelerate calculations from the PI to the ZynqBerry Zero.
I love the small form factor of this board and the image processing interface capabilities that it provides. I am going to add this board to my list of future Hackster projects for image processing solutions.