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A significant number of my clients’ projects, for which I design the SoCs, FPGAs and boards, need to communicate with remote sensors or other remote equipment. While there is more to interfaces such as Time Sensitive Networking and CAN, legacy standards like RS485 and RS422 still remain very popular. RS485 and RS422 are used in a range of applications from industrial control to aircraft / vehicle electronics, satellites and home / building automation. In short, it is an interface we need to now how to work with as electronic / SoC / FPGA designers.
RS422 and RS485 are popular as they can be used to interface with remote devices and sensors down either PCB backplanes or across long cable runs of up to 1,200 meters (although the data rate drops with distance from as high as 35 Mbps to 100 Kbps). The differential nature of the signaling, also provides significant noise immunity, and unlike LVDS, they can be easily electrically isolated.
Another reason RS485 and RS422 are popular is thanks to the simplicity with which we can implement an interface. Often, all we require is a UART to transfer bytes of data — of course, we do need a data link layer (and perhaps higher layers) to transfer data successfully between nodes and use it in the application.
One of the most critical bottlenecks in building hardware architectures for complex datapath workloads is the speed of the memory subsystem. With the two latest additions to the Alveo™ accelerator card portfolio, the Alveo U50 and Alveo U280, we set out to eliminate that bottleneck by integrating high bandwidth memory gen2 (HBM2) into each of them. HBM2 is stacked DRAM memory in-package to shrink the power and PCB footprint but provides astounding memory bandwidth of 460GB/s. This represents a memory technology that delivers enough memory bandwidth to eliminate the memory bottlenecks seen in complex compute and data intensive workloads and fully unlock the incredibly parallel capability of FPGAs.