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Visitor
Visitor
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Registered: ‎07-26-2018

Alveo U50 UART example with Alveo Programming Cable

Hi,

We are trying to connect to the U50 FPGA via UART via the Alveo Programming Cable. Do you know of any examples of simple Verilog code that we can use to test the UART connection.  We want to connect from host PC to FPGA chip via UART going through the Alveo Programming Cable.  The programming cable guide does not give examples of communicating with the FPGA via UART:

https://www.xilinx.com/support/documentation/boards_and_kits/accelerator-cards/ug1377-alveo-programming-cable-user-guide.pdf

The dmesg in Linux clearly shows that 4 USB devices are recognized when the programming cable is connected, but unclear which is JTAG and which is UART going to FPGA chip.  Thanks!

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Xilinx Employee
Xilinx Employee
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Registered: ‎10-19-2015

Re: Alveo U50 UART example with Alveo Programming Cable

Hi @jszefer 

You can use the uart IP and the uart IP example design to get an example of how to use the IP. 

xtp576 has the U50 uart pins information in it. 

Besides that, there is no example design that includes uart usage in the U50 acceleration environment. 

There wouldn't be a uart interface to communicate with the FPGA on the U50 unless you specifically programmed it into a bitstream you made. 

Since this isn't exactly an application of programming the card, the user guide wouldn't describe how to do this. 

Let me know if those resources are helpful.

Regards,

M

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Visitor
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Registered: ‎07-26-2018

Re: Alveo U50 UART example with Alveo Programming Cable

Hi. Thanks for the suggestion.  Can you let us know the link to xtp576?  I'm not able to find the document.

We will add uart interface and uart module to our design, however, do the uart pins in xtp576 connect directly to the programming cable?  We're having problem understanding how to connect Computer <-> Alveo Programming Cable <-> FPGA chip.  If the xtp576 uart pins connect directly to the Alveo Programming Cable, I think that solves our problem.

Thanks!!

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Visitor
Visitor
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Registered: ‎07-26-2018

Re: Alveo U50 UART example with Alveo Programming Cable

Hi, I did find the xtp576 just now. However, now I have a question, what is DBM? Is DBM-01 the alveo programming cable?

# Bank 65 and 68 FPGA UART Interface 0/1/2 to DMB-01 (User selectable Baud)
# FPGA_UART0/1/2_RXD Input from DBM-01 UART to FPGA
# FPGA_UART0/1/2_TXD Output from FPGA to DBM-01 UART
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Visitor
Visitor
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Registered: ‎07-26-2018

Re: Alveo U50 UART example with Alveo Programming Cable

Hi, we ended up trying FPGA_UART0_RXD/TXD and SYSCLK2_P/N), but there is on reply from UART on the computer end. I am not sure if the clock is running at 100MHz as the XDC suggests? Or if the UART is hooked up normally when not using the Alveo shell? Our setup is again: Computer <-- Alveo programming cable --> U50. There is no PCIe nor Alveo shell. Can you confirm if the SYSCLK2_P/N is running and on by default? Thanks!
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Xilinx Employee
Xilinx Employee
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Registered: ‎10-19-2015

Re: Alveo U50 UART example with Alveo Programming Cable

Hi @jszefer,

The U50 gets power from PCIe, how are you powering the card if there is no PCIe?

From what I can tell, the UART is connected from the FPGA to the 2x15 pin connector, then ultimately to the USB cable. The 2x15 connector needs the DMB to convert all the signals to USB. 

Can you verify that your UART settings are the same on the FPGA as they are on your host connection? 

Regards,

M

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Visitor
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Registered: ‎07-26-2018

Re: Alveo U50 UART example with Alveo Programming Cable

Hi,

We have adapter that  that provides power via the PCIe pins while not actually being a PCIe connection.   The board is properly powered and can be programmed with JTAG, so seems the power is okay.  We will check the configuration to make sure the baud rate is okay, but so far we could not find any mismatch.

Thanks!

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