cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
eryk2303
Visitor
Visitor
227 Views
Registered: ‎03-24-2021

Clk as input in flip flop

Jump to solution

Hi,

I would like to add 5-6 blok for one CLK signal. When I add more then 4 block I have timing errors. 

tmp.png

Can I do something like in this photo? And this can help reduce timing errors?

 

0 Kudos
1 Solution

Accepted Solutions
joancab
Advisor
Advisor
208 Views
Registered: ‎05-11-2015

That's probably the result of treating clocks as signals.

clocks have dedicated networks to ensure timing is met. If you need to "clock" block B from block A, one approach is to drive an enable signal

View solution in original post

1 Reply
joancab
Advisor
Advisor
209 Views
Registered: ‎05-11-2015

That's probably the result of treating clocks as signals.

clocks have dedicated networks to ensure timing is met. If you need to "clock" block B from block A, one approach is to drive an enable signal

View solution in original post