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Newbie
Newbie
152 Views
Registered: ‎05-14-2020

U200 ,pcie integrated block didn't work

Recently , I instantiated a pcie endpoint Ip using IP catlog, but after successfully gengerating the bit files and download it into U200 ,The Computer couldn't  find  the PCIE! The constraint I used is from XILINX.COM  and the synthesis tools is VIVADO2019.1 。When I restart the computer ,The default version that download by xilinx can  work well. So, I dont't know where the problem is ?

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Newbie
Newbie
146 Views
Registered: ‎05-14-2020

Re: U200 ,pcie integrated block didn't work

The pcie is Gen3x8
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Xilinx Employee
Xilinx Employee
67 Views
Registered: ‎10-19-2015

Re: U200 ,pcie integrated block didn't work

Hi @whoarethere 

How are you generating the PCIe block? 

You should be using IPI and the board aware flow, this should contain all the constraints necessary for you. 

Since the shell provided from Xilinx works, but your custom one doesn't the problem is somewhere in the configuration of your IP.

Regards,

M

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