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302 Views
Registered: ‎02-06-2020

Visibility of PCIe DMA

Hi @bchebrol ,

In host code (vadd.cpp) of vadd example I see that buffers are created to transfer the data from host to DDR , will the PCIe DMA come into the picture during this transfers.

 

Thanks & Regards,

Mounika.

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Xilinx Employee
Xilinx Employee
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Registered: ‎12-10-2013

Hi mounika.athuluri1@gmail.com  - the PCIe DMA core is built into the Acceleration Platform as the data path between the host and the card.  So inherently, yes, the data will pass through that core. 

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Registered: ‎02-06-2020

Is that means there is no need to keep pcie Dma IP in soc physically..??

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Xilinx Employee
Xilinx Employee
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Registered: ‎06-04-2018

Hi mounika.athuluri1@gmail.com ,

The XDMA(Xilinx DMA) comes into the picture while transfering the data from host to DDR.

Regards,
Vishnu
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