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max_selles
Observer
Observer
585 Views
Registered: ‎09-06-2018

XRT, failed to load xclbin: "ERROR: No such node (compileWorkGroupSize)"

Hi,

I'm testing the XRT native API, it works fine in Emulation HW but in HW mode the function xrtDeviceLoadXclbinHandle() return NULL with this msg:

 

[XRT] ERROR: No such node (compileWorkGroupSize)
[XRT] ERROR: failed to load xclbin

 

Device and xcbin handle were correctly created, my U200 card is correctly found by xbmgmt and up-to-date. 

 

 

Anyone have an idea?

Thank you. Maxime.

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7 Replies
max_selles
Observer
Observer
551 Views
Registered: ‎09-06-2018

Hi, 

I have the same issue with the V_add RTL kernel example using the openCL API.

 

Thank you. Maxime.

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max_selles
Observer
Observer
541 Views
Registered: ‎09-06-2018

Some informations:

- Ubuntu 18.6 
- Alveo U200
- Vitis 2020.2

 

wbmgmt flash --scan

max_selles_0-1614873049012.png

 

xbutil validate 

max_selles_1-1614873199255.png

 

Output of the Vadd RTL kernel example host program:

max_selles_2-1614873523571.png

 

Thank you. Maxime.

 

 

 

 

 

 

 

 

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emeryw
Xilinx Employee
Xilinx Employee
502 Views
Registered: ‎12-06-2019

Hi @max_selles ,

Thanks for reaching out. Can you please post the results of an 'xbutil query'?

Per https://www.xilinx.com/html_docs/xilinx2020_2/vitis_doc/acceleration_installation.html#vhc1571429852245 , your OS is not listed in the supported operating systems. Have you tried this on a machine running a supported OS?

edited: Also, have you tried loading the xclbin onto the card with the following: xbutil program -p <your xclbin file>?

Best,
-Emery
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max_selles
Observer
Observer
443 Views
Registered: ‎09-06-2018

Hi Emery, thank for your help.

 

I was wrong, I use Ubuntu 18.04 (witch is listed in supported OS).

Yes I am able to load xclbin with xbutil program -p, I have tried with several xclbin and it works fine.

 

As requested, the output of xbutil query:

INFO: Found total 1 card(s), 1 are usable
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
System Configuration
OS name:	Linux
Release:	4.15.0-136-generic
Version:	#140-Ubuntu SMP Thu Jan 28 05:20:47 UTC 2021
Machine:	x86_64
Model:		SYS-5019P-MTR
CPU cores:	20
Memory:		127587 MB
Glibc:		2.27
Distribution:	Ubuntu 18.04.5 LTS
Now:		Fri Mar  5 07:33:29 2021 GMT
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
XRT Information
Version:	2.8.743
Git Hash:	77d5484b5c4daa691a7f78235053fb036829b1e9
Git Branch:	2020.2
Build Date:	2020-11-16 00:19:11
XOCL:		2.8.743,77d5484b5c4daa691a7f78235053fb036829b1e9
XCLMGMT:	2.8.743,77d5484b5c4daa691a7f78235053fb036829b1e9

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Shell                           FPGA                            IDCode
xilinx_u200_xdma_201830_2       xcu200-fsgd2104-2-e             0x14b37093
Vendor          Device          SubDevice       SubVendor       SerNum          
0x10ee          0x5001          0x000e          0x10ee          2129048AJ033    
DDR size        DDR count       Clock0          Clock1          Clock2          
64 GB           4               300             500             0               
PCIe            DMA chan(bidir) MIG Calibrated  P2P Enabled     OEM ID          
GEN 3x8         2               true            false           0x25a20740(N/A) 
DNA                             CPU_AFFINITY    HOST_MEM size   Max HOST_MEM    
                                0-19            0 Byte          0 Byte          
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Temperature(C)
PCB TOP FRONT   PCB TOP REAR    PCB BTM FRONT   VCCINT TEMP     
33              30              34              N/A             
FPGA TEMP       TCRIT Temp      FAN Presence    FAN Speed(RPM)  
34              34              A               1067            
QSFP 0          QSFP 1          QSFP 2          QSFP 3          
N/A             N/A             N/A             N/A             
HBM TEMP        
N/A             
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Electrical(mV|mA)
12V PEX         12V AUX         12V PEX Current 12V AUX Current 
12214           12318           1162            678             
3V3 PEX         3V3 AUX         DDR VPP BOTTOM  DDR VPP TOP     
3355            3334            2500            2500            
SYS 5V5         1V2 TOP         1V8 TOP         0V85            
5452            1198            1835            854             
MGT 0V9         12V SW          MGT VTT         1V2 BTM         
911             12200           1213            1203            
VCCINT VOL      VCCINT CURR     VCCINT IO VOL   VCC3V3 VOL      
850             10704           N/A             N/A             
3V3 PEX CURR    VCCINT IO CURR  HBM1V2 VOL      VPP2V5 VOL      
N/A             N/A             N/A             N/A             
VCC1V2 CURR     V12 I CURR      V12 AUX0 CURR   V12 AUX1 CURR   
N/A             N/A             N/A             N/A             
12V AUX1 VOL    VCCAUX VOL      VCCAUX PMC VOL  VCCRAM VOL      
N/A             N/A             N/A             N/A             
3V3 AUX CURR    POWER WARN      
N/A             N/A             
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Card Power(W)
22
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Firewall Last Error Status
Level 0 : 0x0(GOOD)

ECC Error Status
Tag     Errors      CE Count  UE Count  CE FFA              UE FFA              
bank1   (None)      0         0         0x0                 0x0                 
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Memory Status
     Tag                 Type        Temp(C)  Base Address    Size    Mem Usage   BO count
[ 0] bank0               **UNUSED**  27       0x4000000000    16 GB   0 Byte      0       
[ 1] bank1               MEM_DDR4    30       0x5000000000    16 GB   0 Byte      0       
[ 2] bank2               **UNUSED**  29       0x6000000000    16 GB   0 Byte      0       
[ 3] bank3               **UNUSED**  28       0x7000000000    16 GB   0 Byte      0       
[ 4] PLRAM[0]            **UNUSED**  N/A      0x3000000000    128 KB  0 Byte      0       
[ 5] PLRAM[1]            **UNUSED**  N/A      0x3000200000    128 KB  0 Byte      0       
[ 6] PLRAM[2]            **UNUSED**  N/A      0x3000400000    128 KB  0 Byte      0       
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
DMA Transfer Metrics
Chan[0].h2c:  5184 MB
Chan[0].c2h:  3666 MB
Chan[1].h2c:  2 GB
Chan[1].c2h:  1968 MB
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Streams
     Tag         Flow ID  Route ID Status   Total (B/#)     Pending (B/#)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Xclbin UUID
f2f4ee82-6950-4ef9-9e04-0a62148a58bd
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
Compute Unit Status
CU[ 0]: Vadd_A_B:Vadd_A_B_1             @0x1800000         (IDLE)
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
INFO: xbutil query succeeded.

 

 

Thank's

Maxime.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

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sonaise
Newbie
Newbie
440 Views
Registered: ‎03-04-2021

I have the same problem with you
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max_selles
Observer
Observer
353 Views
Registered: ‎09-06-2018

Hi @sonaise,
Glad to know that I'm not alone.

 

The problem is not resolved, but if I load the xclbin with "xbutil program -p" and comment the function "xrtDeviceLoadXclbinHandle" it works. But this is not the write solution !
@emeryw have you an idea?

 

Thanks,
Maxime.

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emeryw
Xilinx Employee
Xilinx Employee
226 Views
Registered: ‎12-06-2019

Hi @max_selles ,

I gave this a try on our U200 lab machine, and was successfully able to build and run the RTL example design from within the Vitis 2020.2 GUI and via the XRT commands. I followed the guide here to create and run the project: https://xilinx.github.io/Vitis-Tutorials/2020-2/docs/Hardware_Accelerators/Feature_Tutorials/01-rtl_kernel_workflow/README.html

 

INFO: Found 1 platforms
INFO: Selected platform 0 from Xilinx
INFO: Found 1 devices
CL_DEVICE_NAME xilinx_u200_xdma_201830_2
Selected xilinx_u200_xdma_201830_2 as the target device
INFO: loading xclbin ../binary_container_1.xclbin
INFO: Test completed successfully.

 

I wanted to confirm this was the same tutorial that was being followed. I also don't see the function that you had commented out; could you please elaborate on where that is? I agree, it should not have to be commented out to make it work. Is this XRT that was built from source, or downloaded and installed via the U200 product page: https://www.xilinx.com/products/boards-and-kits/alveo/u200.html

The card shows up in XRT and passes validation fine. Are you able to run other example designs on the card without issue? If you receive the same [XRT] ERROR: No such node (compileWorkGroupSize), could you please capture a dmesg and attach it to your response?

Best,
-Emery
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