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Visitor krojek
Visitor
261 Views
Registered: ‎01-09-2019

I cannot compile any code with hw_emu mode: ERROR: [CFGEN 83-1390] Cannot create port.

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I cannot compile any code with hw_emu mode. I downloaded examples from:

git clone https://github.com/Xilinx/SDAccel_Examples

The example that I work with is: /examples/getting_started/misc/vadd

I haven't modified the makefile and source codes.

I have an access to the Nimbix cloud, where this example compiles in every mode (sw_emu, hw_emu, hw) and works fine (tested using: SDAccel - 2018.2 XDF Edition, Ubuntu 16.04 LTS, Alveo xilinx_u200_xdma_201820_1)

Currently, I work on a data center with:

  • SDAccel - 2018.2 XDF Edition
  • Ubuntu 16.04 LTS
  • Linux kernel: 4.4.0-141-generic
  • Alveo: xilinx_u250_xdma_201830_1

I have installed:

  • Xilinx_SDx_xdf_Lin_2018.2_0925_1753_Lin64.bin
  • xilinx-u250-xdma-201830.1_16.04.deb
  • xilinx-u250-xdma-201830.1-dev_16.04.deb
  • xrt_201830.2.1.1695_16.04-xrt.deb

 

The code compiles and executes with sw_emu mode. However, when I try to compile using hw_emu mode I get:

~/examples/getting_started/misc/vadd$ make check TARGET=hw_emu DEVICE=xilinx_u250_xdma_201830_1
mkdir -p ./xclbin
/opt/xilinx/SDx/2018.2.xdf/bin/xocc -t hw_emu --platform xilinx_u250_xdma_201830_1 --save-temps --temp_dir ./_x.hw_emu.xilinx_u250_xdma_201830_1 -c -k krnl_vadd -I'src' -o'xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xo' 'src/krnl_vadd.cl'

****** xocc v2018.2.xdf (64-bit)
**** SW Build 2342198 on Tue Sep 25 18:17:42 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Attempting to get a license: ap_opencl
Feature available: ap_opencl
INFO: [XOCC 60-585] Compiling for hardware emulation target
Running SDx Rule Check Server on port:34837
Platform repo paths:
/opt/xilinx/platforms
PlatformMgr contains the following platforms:
/opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
INFO: [XOCC 60-895] Target platform: /opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
INFO: [XOCC 60-423] Target device: xilinx_u250_xdma_201830_1
INFO: [XOCC 60-242] Creating kernel: 'krnl_vadd'

===>The following messages were generated while performing high-level synthesis for kernel: krnl_vadd Log file:/home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1/krnl_vadd/vivado_hls.log :
INFO: [XOCC 204-61] Option 'relax_ii_for_timing' is enabled, will increase II to preserve clock frequency constraints.
INFO: [XOCC 204-61] Pipelining loop 'Loop 1.1'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 3.
INFO: [XOCC 204-61] Pipelining loop 'read_b_write_c'.
INFO: [XOCC 204-61] Pipelining result : Target II = 1, Final II = 1, Depth = 4.
INFO: [XOCC 60-594] Finished kernel compilation
INFO: [XOCC 60-244] Generating system estimate report...
INFO: [XOCC 60-1092] Generated system estimate report: /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/reports/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1/system_estimate_krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xtxt
INFO: [XOCC 60-586] Created xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xo
INFO: [XOCC 60-791] Total elapsed time: 0h 0m 38s
mkdir -p ./xclbin
/opt/xilinx/SDx/2018.2.xdf/bin/xocc -t hw_emu --platform xilinx_u250_xdma_201830_1 --save-temps --temp_dir ./_x.hw_emu.xilinx_u250_xdma_201830_1 -l --nk krnl_vadd:1 -o'xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xclbin' xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xo

****** xocc v2018.2.xdf (64-bit)
**** SW Build 2342198 on Tue Sep 25 18:17:42 MDT 2018
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

Platform repo paths:
/opt/xilinx/platforms
PlatformMgr contains the following platforms:
/opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
INFO: [XOCC 60-629] Linking for hardware emulation target
Running SDx Rule Check Server on port:43150
Platform repo paths:
/opt/xilinx/platforms
PlatformMgr contains the following platforms:
/opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
INFO: [XOCC 60-895] Target platform: /opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
INFO: [XOCC 60-423] Target device: xilinx_u250_xdma_201830_1
INFO: [XOCC 60-825] xocc command line options for sdx_link are --xo xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xo --nk krnl_vadd:1 -keep
using /opt/xilinx/platforms/xilinx_u250_xdma_201830_1/xilinx_u250_xdma_201830_1.xpfm
extracting xo v3 file /home/krojek/examples/getting_started/misc/vadd/xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xo
Creating IP database /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/link/sys_link/_sds/.cdb/xd_ip_db.xml
processing accelerators: /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/link/sys_link/iprepo/xilinx_com_hls_krnl_vadd_1_0
ip_dir: /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/link/sys_link/iprepo/xilinx_com_hls_krnl_vadd_1_0
/opt/xilinx/SDx/2018.2.xdf/bin/xsltproc --stringparam xpath "spirit:component/spirit:name/text()" /opt/xilinx/SDx/2018.2.xdf/scripts/xdcc/xpathValueOf.xsl /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/link/sys_link/iprepo/xilinx_com_hls_krnl_vadd_1_0/component.xml
ip_name: krnl_vadd
Creating apsys_0.xml
INFO: [CFGEN 83-0] Kernel Specs:
INFO: [CFGEN 83-0] kernel: krnl_vadd, num: 1 {krnl_vadd_1}
ERROR: [CFGEN 83-1390] Cannot create port 'xdma.memory_subsystem' with portType: ''
ERROR: [CFGEN 83-1307] getPort(memory_subsystem, xdma) is null
ERROR: [CFGEN 83-1316] Failed request for port named memory_subsystem in xd:component type xdma
INFO: [CFGEN 83-2226] Inferring mapping for argument krnl_vadd_1.a to DDR[0]
INFO: [CFGEN 83-2226] Inferring mapping for argument krnl_vadd_1.b to DDR[0]
INFO: [CFGEN 83-2226] Inferring mapping for argument krnl_vadd_1.c to DDR[0]
ERROR: [CFGEN 83-1378] NULL comp port: a --> NULL ctrl:slr0/interconnect_axilite_user_0_M01_AXI
ERROR: [CFGEN 83-1332] CF data model: port map [1] error. Block: swblk_krnl_vadd, Comp: xdma
ERROR: [CFGEN 83-2214] Cannot write apsys_0.xml

Error generating design file for apsys_0.xml
command: /opt/xilinx/SDx/2018.2.xdf/bin/cfgen -nk krnl_vadd:1 -r /home/krojek/examples/getting_started/misc/vadd/_x.hw_emu.xilinx_u250_xdma_201830_1/link/sys_link/_sds/.cdb/xd_ip_db.xml -o apsys_0.xml
Error creating intermediate design file, exiting
ERROR: [XOCC 60-398] sdx_link failed
ERROR: [XOCC 60-626] Kernel link failed to complete
ERROR: [XOCC 60-703] Failed to finish linking
Makefile:74: recipe for target 'xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xclbin' failed
make: *** [xclbin/krnl_vadd.hw_emu.xilinx_u250_xdma_201830_1.xclbin] Error 1

 

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1 Solution

Accepted Solutions
Moderator
Moderator
203 Views
Registered: ‎04-12-2017

Re: I cannot compile any code with hw_emu mode: ERROR: [CFGEN 83-1390] Cannot create port.

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Hello @krojek

From the log you have shared it looks like shell XRT and DSA versions are not matching.

I will recommend you to run the bring process of U250 from scratch by following UG1301. 

Also refer steps given under following link:

https://www.nimbix.net/alveo-fpga-tutorial/

Thank You.

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2 Replies
Moderator
Moderator
204 Views
Registered: ‎04-12-2017

Re: I cannot compile any code with hw_emu mode: ERROR: [CFGEN 83-1390] Cannot create port.

Jump to solution

Hello @krojek

From the log you have shared it looks like shell XRT and DSA versions are not matching.

I will recommend you to run the bring process of U250 from scratch by following UG1301. 

Also refer steps given under following link:

https://www.nimbix.net/alveo-fpga-tutorial/

Thank You.

-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
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Visitor krojek
Visitor
197 Views
Registered: ‎01-09-2019

Re: I cannot compile any code with hw_emu mode: ERROR: [CFGEN 83-1390] Cannot create port.

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After updating the version of DSA it works. Thank you for your help.