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Observer marrirohit
Registered: ‎10-29-2012

Require help in Basic transmission and reception process of SATA

Hi all,

           in Serial ATA technology we perform the speed negotiation and all with respect to the incoming data. How can we make sure that at receiver the first bit is received correctly.. We use a count variable (0 to 39)to store the incoming data, the transmitter may send the data at any speed while speed negotiation, if the speed is changed how can we make sure that the data is received at count[0].

           at receiver end we will have a clock recovery circuit can I assume digital inputs from the analog block giving different values for different retrieved clock. Can I assume that the input changes only at posedge of the operating clock of layers(not the clock used for transmitting data serially). If the receiver receives the bit correctly but in wrong position (i.e. if the incoming bit is captured at count[39] instead of count[0] ) the host and device will never be able to communicate properly.. How to synchronize the host and device.Please HELP




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