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Contributor
Contributor
8,082 Views
Registered: ‎04-22-2013

debug mb

hi

 i use  Virtex5 ml 501 with{edk,sdk,ise} version 10.1

when I create my embedded system and I do the following steps:

----------------------------------------------------------------------------------------------

hardware------>generate netlist

after she finishes

hardware------>generate bitstream

after she finishes

device configuration------->update bitstream

after she finishes

device configuration------->download bitstream

----------------------------------------------------------------------------------------------

after i click  debug optionan and i choose hardware

debug------------>lunch  xmd

xmd%tagets

info: not connect to any target

---------------------------------------------------------------------------------------------

I tried to download the Virtex 5 in another way, as follows:

I create my embedded system using the xps edk until the "system assembly view" and after I do this step in edk:

hardware------->generate netlist

hardware------->generate bitstream 

----------------------------------------------------------------------------------------------

now i open ise 10.1 

file new 

vhdl----->ppm1.vhd------->ok

I said later as an example two input clk and reset

after i naviguate with ok an yes 

now i open the file "system_stub.vhd

and I copy the lines that I used so as TBD get this code:

 

----------------------------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

---- Uncomment the following library declaration if instantiating
---- any Xilinx primitives in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity ppm1 is
Port ( 

fpga_0_RS232_Uart_RX_pin : in std_logic;
fpga_0_RS232_Uart_TX_pin : out std_logic;
fpga_0_LEDs_8Bit_GPIO_IO_pin : inout std_logic_vector(0 to 7);
fpga_0_LEDs_Positions_GPIO_IO_pin : inout std_logic_vector(0 to 4);
fpga_0_Push_Buttons_5Bit_GPIO_IO_pin : inout std_logic_vector(0 to 4);
fpga_0_DIP_Switches_8Bit_GPIO_IO_pin : inout std_logic_vector(0 to 7);
fpga_0_IIC_EEPROM_Scl_pin : inout std_logic;
fpga_0_IIC_EEPROM_Sda_pin : inout std_logic;
fpga_0_SRAM_Mem_A_pin : out std_logic_vector(7 to 30);
fpga_0_SRAM_Mem_DQ_pin : inout std_logic_vector(0 to 31);
fpga_0_SRAM_Mem_BEN_pin : out std_logic_vector(0 to 3);
fpga_0_SRAM_Mem_OEN_pin : out std_logic;
fpga_0_SRAM_Mem_CEN_pin : out std_logic;
fpga_0_SRAM_Mem_ADV_LDN_pin : out std_logic;
fpga_0_SRAM_Mem_WEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_CLK_pin : in std_logic;
fpga_0_SysACE_CompactFlash_SysACE_MPA_pin : out std_logic_vector(6 downto 0);
fpga_0_SysACE_CompactFlash_SysACE_MPD_pin : inout std_logic_vector(15 downto 0);
fpga_0_SysACE_CompactFlash_SysACE_CEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_OEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_WEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rst_n_pin : out std_logic;
fpga_0_Ethernet_MAC_PHY_crs_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_col_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_tx_data_pin : out std_logic_vector(3 downto 0);
fpga_0_Ethernet_MAC_PHY_tx_en_pin : out std_logic;
fpga_0_Ethernet_MAC_PHY_tx_clk_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_er_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_clk_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_dv_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_data_pin : in std_logic_vector(3 downto 0);
fpga_0_SRAM_CLK : out std_logic;
fpga_0_SRAM_CLK_FB : in std_logic;
sys_clk_pin : in std_logic;
sys_rst_pin : in std_logic
);
end ppm1;

architecture Behavioral of ppm1 is

 

component system is
port (
fpga_0_RS232_Uart_RX_pin : in std_logic;
fpga_0_RS232_Uart_TX_pin : out std_logic;
fpga_0_LEDs_8Bit_GPIO_IO_pin : inout std_logic_vector(0 to 7);
fpga_0_LEDs_Positions_GPIO_IO_pin : inout std_logic_vector(0 to 4);
fpga_0_Push_Buttons_5Bit_GPIO_IO_pin : inout std_logic_vector(0 to 4);
fpga_0_DIP_Switches_8Bit_GPIO_IO_pin : inout std_logic_vector(0 to 7);
fpga_0_IIC_EEPROM_Scl_pin : inout std_logic;
fpga_0_IIC_EEPROM_Sda_pin : inout std_logic;
fpga_0_SRAM_Mem_A_pin : out std_logic_vector(7 to 30);
fpga_0_SRAM_Mem_DQ_pin : inout std_logic_vector(0 to 31);
fpga_0_SRAM_Mem_BEN_pin : out std_logic_vector(0 to 3);
fpga_0_SRAM_Mem_OEN_pin : out std_logic;
fpga_0_SRAM_Mem_CEN_pin : out std_logic;
fpga_0_SRAM_Mem_ADV_LDN_pin : out std_logic;
fpga_0_SRAM_Mem_WEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_CLK_pin : in std_logic;
fpga_0_SysACE_CompactFlash_SysACE_MPA_pin : out std_logic_vector(6 downto 0);
fpga_0_SysACE_CompactFlash_SysACE_MPD_pin : inout std_logic_vector(15 downto 0);
fpga_0_SysACE_CompactFlash_SysACE_CEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_OEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_WEN_pin : out std_logic;
fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rst_n_pin : out std_logic;
fpga_0_Ethernet_MAC_PHY_crs_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_col_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_tx_data_pin : out std_logic_vector(3 downto 0);
fpga_0_Ethernet_MAC_PHY_tx_en_pin : out std_logic;
fpga_0_Ethernet_MAC_PHY_tx_clk_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_er_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_clk_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_dv_pin : in std_logic;
fpga_0_Ethernet_MAC_PHY_rx_data_pin : in std_logic_vector(3 downto 0);
fpga_0_SRAM_CLK : out std_logic;
fpga_0_SRAM_CLK_FB : in std_logic;
sys_clk_pin : in std_logic;
sys_rst_pin : in std_logic
);
end component;

begin

system_i : system
port map (
fpga_0_RS232_Uart_RX_pin => fpga_0_RS232_Uart_RX_pin,
fpga_0_RS232_Uart_TX_pin => fpga_0_RS232_Uart_TX_pin,
fpga_0_LEDs_8Bit_GPIO_IO_pin => fpga_0_LEDs_8Bit_GPIO_IO_pin,
fpga_0_LEDs_Positions_GPIO_IO_pin => fpga_0_LEDs_Positions_GPIO_IO_pin,
fpga_0_Push_Buttons_5Bit_GPIO_IO_pin => fpga_0_Push_Buttons_5Bit_GPIO_IO_pin,
fpga_0_DIP_Switches_8Bit_GPIO_IO_pin => fpga_0_DIP_Switches_8Bit_GPIO_IO_pin,
fpga_0_IIC_EEPROM_Scl_pin => fpga_0_IIC_EEPROM_Scl_pin,
fpga_0_IIC_EEPROM_Sda_pin => fpga_0_IIC_EEPROM_Sda_pin,
fpga_0_SRAM_Mem_A_pin => fpga_0_SRAM_Mem_A_pin,
fpga_0_SRAM_Mem_DQ_pin => fpga_0_SRAM_Mem_DQ_pin,
fpga_0_SRAM_Mem_BEN_pin => fpga_0_SRAM_Mem_BEN_pin,
fpga_0_SRAM_Mem_OEN_pin => fpga_0_SRAM_Mem_OEN_pin,
fpga_0_SRAM_Mem_CEN_pin => fpga_0_SRAM_Mem_CEN_pin,
fpga_0_SRAM_Mem_ADV_LDN_pin => fpga_0_SRAM_Mem_ADV_LDN_pin,
fpga_0_SRAM_Mem_WEN_pin => fpga_0_SRAM_Mem_WEN_pin,
fpga_0_SysACE_CompactFlash_SysACE_CLK_pin => fpga_0_SysACE_CompactFlash_SysACE_CLK_pin,
fpga_0_SysACE_CompactFlash_SysACE_MPA_pin => fpga_0_SysACE_CompactFlash_SysACE_MPA_pin,
fpga_0_SysACE_CompactFlash_SysACE_MPD_pin => fpga_0_SysACE_CompactFlash_SysACE_MPD_pin,
fpga_0_SysACE_CompactFlash_SysACE_CEN_pin => fpga_0_SysACE_CompactFlash_SysACE_CEN_pin,
fpga_0_SysACE_CompactFlash_SysACE_OEN_pin => fpga_0_SysACE_CompactFlash_SysACE_OEN_pin,
fpga_0_SysACE_CompactFlash_SysACE_WEN_pin => fpga_0_SysACE_CompactFlash_SysACE_WEN_pin,
fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin => fpga_0_SysACE_CompactFlash_SysACE_MPIRQ_pin,
fpga_0_Ethernet_MAC_PHY_rst_n_pin => fpga_0_Ethernet_MAC_PHY_rst_n_pin,
fpga_0_Ethernet_MAC_PHY_crs_pin => fpga_0_Ethernet_MAC_PHY_crs_pin,
fpga_0_Ethernet_MAC_PHY_col_pin => fpga_0_Ethernet_MAC_PHY_col_pin,
fpga_0_Ethernet_MAC_PHY_tx_data_pin => fpga_0_Ethernet_MAC_PHY_tx_data_pin,
fpga_0_Ethernet_MAC_PHY_tx_en_pin => fpga_0_Ethernet_MAC_PHY_tx_en_pin,
fpga_0_Ethernet_MAC_PHY_tx_clk_pin => fpga_0_Ethernet_MAC_PHY_tx_clk_pin,
fpga_0_Ethernet_MAC_PHY_rx_er_pin => fpga_0_Ethernet_MAC_PHY_rx_er_pin,
fpga_0_Ethernet_MAC_PHY_rx_clk_pin => fpga_0_Ethernet_MAC_PHY_rx_clk_pin,
fpga_0_Ethernet_MAC_PHY_dv_pin => fpga_0_Ethernet_MAC_PHY_dv_pin,
fpga_0_Ethernet_MAC_PHY_rx_data_pin => fpga_0_Ethernet_MAC_PHY_rx_data_pin,
fpga_0_SRAM_CLK => fpga_0_SRAM_CLK,
fpga_0_SRAM_CLK_FB => fpga_0_SRAM_CLK_FB,
sys_clk_pin => sys_clk_pin,
sys_rst_pin => sys_rst_pin
);


end Behavioral;

 ----------------------------------------------------------------------------------------------------------------------------------

i "add existing source" and i choose "system.xmp" and i click to choose "implementation "

and i click ok

now i copy "system.ucf " and I move in ppm1 and renames "ppm1.ucf"

i click in ppm1.ucf ----------->ok

----------------------------------------------------------------------------------------------------------------------------

now  ,double click in generate programming file

When this step is completed, double click in"update bitstream with processor data"

When this step is completed,doble click configure target device  

up to right    3 bypass an i click in ppm1.bit and i  click open

right click and proram

in the console proram succed 

------------------------------------------------------------------------

among the files that I've found is ppm1.bit and I can not find the file download.bit
I do not know why?

---------------------------------------------------------------------------

in edk debug option>>>>>>>>>hardware>>>>>>><ok

debug>>>>>>>>>>lunch xmd debug

                                         |

                                         |

starting gdb server for "mb" target (id=0)at tcp port no 1234

xmd%dow testapp_memory/executable.elf

System Reset ..........Donne 

downloading program--estapp_memory/executable.elf

                                         |

                                         |

                                         |

setting pc withprogram start address 0*00000000

xmd%run

info :processor started.type "stop" to stopprocessor

Running xmd>info:cable is locked .........retrying

info:cable is locked .........retrying

 

info:cable is locked .........retrying

 

info:cable is locked .........retrying

 

info:cable is locked .........retrying

 

info:cable is locked .........retrying

-------------------------------------------------------------------------------------------------

in tera term i see this (9600,8,none 1,none) i see this:

---------------------------------------------------------------------------------------------------

 

ii«#5#1¿%=-#¯­¿¥¥åëY=-#1¿e5%!W5¿3!Y[}e‹åë¿¿[##-#1¿™›¥;-¿5£££s}mguw½åë¿¿
[##-#1¿“¥;-¿5£££s}mguw½åë¿¿[##-#1¿¥;-¿5£££s}mguw½å륥¿u--#1¿%=-#¯­
¿¥¥åë

----------------------------------------------------------------------------------------------------------------------------

 What are the problems in your opinion

and I have to do?

 

 

 

 

please help me if possible.

 

trying to debug a program with the MicroBlaze
Hi

I use the environment Xinx (edk, ise ..) version 10.1 and when I type in "dow testapp_peripheral / executable.elf" xmd console and even the test of memory, I oubtient this:

xmd% dow testapp_memory/executable.elf
system reset downloading....DONE
downloading program--testapp_memory/executable.elf
section ,.vector.reset:0*00000000-0*00000007
section ,.vector. sw_exception:0*000000008-0*00000000f
.
.
.
.
.
.
.
.
section ,.stack:0*8a307348-0*8a309347
setting PC with Program start Adress 0*00000000
xmd% run
info: Processor Started.Type "stop" to stop processor
RUNNNING>xmd% info: cable is locked.Retrying....
info: cable is locked.Retrying....
info: cable is locked.Retrying....
info: cable is locked.Retrying....
info: cable is locked.Retrying....


Does there anyone who can help me?
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