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Virtex7 BRAM implementation issue

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Explorer
Posts: 352
Registered: ‎03-31-2016

Virtex7 BRAM implementation issue

Hello

 

I want to used a big size BRAM, and used updatemem to reconfigure BRAM value, so i will manual write MMI file.

 

I don't know how to calculate BRAM data width partition guide.

 

Have any document description?

 

 

1024x100 BRAM will used 3 of RAMB36E1 to implement, there BRAM datawidth is 28-bit, 36-bit and 36-bit to combin 1024x100 BRAM.

 

How to calculate datawidth bits?

 

Moderator
Posts: 166
Registered: ‎08-08-2017

Re: Virtex7 BRAM implementation issue

Hi @quincyq2003

 

If i understood correctly, your objective here is to cascade the RAMB36E1 structures for 1024 * 100 BRAM configuration.

If you want to know the cascading considerations, refer to the page 37 of 7 series memory user guide.

 

BRAM_cascade.PNG 

 

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