08-04-2009 08:57 AM
I am a beginner with CPLDs and programmable logic in general, so I am starting off with designs based in schematic capture. However, I see that Xilinx has some pre-made modules in their application notes section that can be very useful (such as a UART, SPI master, I2C master, etc.), and they provide the VHDL/Verilog code for these modules. Using the Xilinx ISE, is there a way to save all of the VHDL/Verilog text code (top level model and all associated files), and then port it into the schematic capture as a “black box” component that I can drag, drop, and connect it with other components (like and gates, I/O pins, etc.)?
08-04-2009 02:43 PM
If you have an HDL file, let's say a Verilog module named i2c_slave.v for example. In the
ISE GUI, select Project --> Add source (or add copy of source if you want to create a copy in
the project folder). Browse to the verilog file and open it. In the associations window select
"All" from the drop down list to enable use for synthesis and simulation. Then if you
click the sources tab in the project you should see this file. If you select it (one click)
and look below at the Processes tab, you should have an item called "Design Utilities"
and under that "Create Schematic symbol". This will automatically create a symbol
from the Verilog source with pins for all of the module's ports. In the Symbols tab
you will find this symbol under your project directory which should appear at the
top of the list above Arithmetic. You can place this on the schematic like any other