02-09-2011 05:09 AM
In order to simply fanout on a XC2C128 Coolrunner-II CPLD in the CP132 package I need to tie the TMS or TDO JTAG pins to an adjacent unused I/O pin that has VCCIO=1.5V. Are there any issues with doing this? I am assuming that I want to set the unused I/O termination to FLOAT. I am also concerned about this at part configuration and powerup.
Any help would be greatly appreciated.
02-09-2011 06:22 AM
There wouldn't be any problems with the JTAG going to the I/O's, even if
the JTAG runs at a higher voltage. However I would be concerned about
the possibility of downloading a configuration that drives one of these
"unused" I/O's and therefore prevents you from reconfiguring the device.
Then you'd need to pull the device from the board to fix it.
If you are willing to take that chance, then the only other concern is how
these pins behave on power-up. I would definitely not try this with
the TCK pin. With TCK pulled low, the other JTAG pins should be
Also during configuration, there should not be problems, however
you need to be careful not to use boundary scan commands that
could enable drivers on these I/O's. That would not be as bad
as programming the I/O's to drive, because you only need to
re-power the board to get out of the state, but still something that
you might want to consider if you use automated test equipment.
02-09-2011 11:59 AM
Thanks for your response! This would only be done with TMS and TDO. I would probably not care about the TDO being corrupted by the I/O line if it was accidently configured wrong. The TMS line I could short it out to overpower the I/O if it was the one in contention. The corresponding IOB would not like it but on a prototype board who cares. Thoughts?