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Visitor glaxman1992
Visitor
257 Views
Registered: ‎08-06-2019

FPGA Configuration through processor using slave serial mode

Hi,

Im trying to configuring the FPGA Spartran-6 through imx6q sabresd processor using slave serial mode.

Im able to send bin data bit-by-bit to FPGA.  but, DONE pin is not going HIGH.

Please help me.

Thank you,

 

Regards,

laxman

8 Replies
253 Views
Registered: ‎07-13-2018

Re: FPGA Configuration through processor using slave serial mode

Even I'm also facing the same issue seeking for help here.
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Participant fincs
Participant
221 Views
Registered: ‎03-21-2016

Re: FPGA Configuration through processor using slave serial mode

Is the configuration file compressed? Is it possible to look at the oscilloscope and compare the timings of the configuration?

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Xilinx Employee
Xilinx Employee
200 Views
Registered: ‎08-13-2007

Re: FPGA Configuration through processor using slave serial mode

You might want to review this reference:

 http://www.xilinx.com/support/documentation/application_notes/xapp502.pdf (Using a Microprocessor to Configure Xilinx FPGAs via Slave Serial or SelectMAP Mode)

and note the # of extra CCLK cycles potentially required here.

(this is the updated version for 7 series but conceptually is very similar if I remember right: http://www.xilinx.com/support/documentation/application_notes/xapp583-fpga-configuration.pdf (Using a Microprocessor to Configure 7 Series FPGAs via Slave Serial or Slave SelectMAP Mode)

Cheers,

bt

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Xilinx Employee
Xilinx Employee
187 Views
Registered: ‎08-25-2010

回复: FPGA Configuration through processor using slave serial mode

Hi @glaxman1992

Can you check if the timing is same as figure 2-4 in ug380 at:

https://www.xilinx.com/support/documentation/user_guides/ug380.pdf

For example, bit sequence you sent. What's the CCLK frequency? Do you continually send more CCLK after data was delievered? Is the JTAG programing successful?

 

Thanks
Simon
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Visitor glaxman1992
Visitor
164 Views
Registered: ‎08-06-2019

回复: FPGA Configuration through processor using slave serial mode

Hi,Thank you so much for response.

Actually im generating the clock of 250khz and after sending all bit data, waiting for DONE become high and concurrently generating the clock until DONE pin become high. but, DONE pin is not at all going high even i wait for a long period of time. 

 

Thank you,

Regards,

laxman

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147 Views
Registered: ‎07-13-2018

Re: FPGA Configuration through processor using slave serial mode

CCLK generating by the processor has a frequency of 450khz is it fine for data transmission? 

I'm using .Bin file which not byte-swapped in slave serial mode, do I need any other files for this process?

 

 

 

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133 Views
Registered: ‎01-22-2015

Re: FPGA Configuration through processor using slave serial mode

@glaxman1992 

@sivakumarreddy50 

Here’s some things to do and check for slave-serial configuration of a Spartan-6:

  1. Gather references: UG380(v2.11), DS162(v3.1.1)
    https://www.xilinx.com/support/documentation/user_guides/ug380.pdf
    https://www.xilinx.com/support/documentation/data_sheets/ds162.pdf
  2. Check that voltages applied to FPGA satisfy min/max requirements of Table 2 in DS162. For all Spartan-6 except -1L grade, we typically use VCCO=3.3V, VCCAUX=3.3V, VCCINT=1.2V. 
  3. Check voltage used by microcontroller. Typically the microcontroller is powered by same voltage as VCCO for FPGA.  This helps ensure that both microcontroller and FPGA are using the same LVCMOS standard (eg. LVCMOS33 when VCCO=3.3V) for input/output.
  4. Check that all connections between microprocessor and FPGA are as shown in Fig 2-3 of UG380 including pullup resistors to VCCO on lines for INIT_B, PROGRAM_B, and DONE.
  5. Also, per Fig 2-3 of UG380 check that M1 and M0 are connected to VCCO. Connect HSWAPEN and SUSPEND to GND.
  6. Generate .bin file that microcontroller will send to FPGA. Byte-swapping should not be used when creating the .bin file.  Also, you cannot use the .bit file instead of the .bin file.
  7. Power up the FPGA. Per page 7 of DS162, the Spartan-6 does not have a required power-on sequence.  That is, all voltages applied to the Spartan-6 can be turned ON at the same time.  However, voltages should ramp from 0V to their final value within ~40ms per Table 6 of DS162.
  8. Power up the microcontroller.
  9. Configure microcontroller IO pins as implied by arrows in Fig 2-3 of UG380: outputs=(CLOCK, SERIAL_OUT, PROGRAM_B),  inputs=(DONE, INIT_B).
  10. After power-up, microcontroller should observe timing shown in Fig 5-4 of UG380 (with numbers from Table 47 of DS162). That is, after power-up, set PROGRAM_B=0 and CLOCK=0 and wait for least TPOR=50ms.  Set PROGRAM_B=1 and wait for at approximately TPL=5ms or until INIT_B pin transitions from 0 to 1. 
  11. Microcontroller should follow Fig 2-4 in UG380 when controlling CLOCK=CCLK and SERIAL_OUT=(Master DIN) lines. Note that bits from the .bin file are placed on the SERIAL_OUT line at the falling-edge of CLOCK .  Ensure that BIT-0 has been placed on SERIAL_OUT line well before the very first rising-edge of CLOCK.
  12. Note from Table 47 of DS162 that CLOCK can have a maximum frequency, FSCCK, of 80MHz. However, your initial testing should be done with a much slower clock (eg. try 2 MHz). 
  13. The microcontroller need not use special communication protocols for controlling CLOCK and SERIAL_OUT. That is, a simple “bit-banging” approach can be used.  For example, with CLOCK=2MHz do the following:  a) put bit on SERIAL_OUT, b) set CLOCK=0, c) wait 250ns, d) set CLOCK=1, e) wait 250ns, f) return to a).
  14. After all bits from the .bin file have be clocked into the FPGA continue toggling CLOCK (with SERIAL_OUT=DIN=1) as described on page 90 of UG380.  That is, toggle CLOCK (with SERIAL_OUT=DIN=1) until you see DONE=1 and then toggle CLOCK (with SERIAL_OUT=DIN=1) for at least 8 more cycles.

Mark

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Visitor glaxman1992
Visitor
16 Views
Registered: ‎08-06-2019

Re: FPGA Configuration through processor using slave serial mode

Thank you so much for reply,

Im doing the same thing but still its not configuring FPGA. Is there any other way to make it work?

 

Thank you,

Regards,

laxman 

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