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123 Views
Registered: ‎07-13-2018

FPGA Configuration

Hi all,

We trying to configuring Spartan 6 FPGA from processor using slave serial mode but the problem is like we are able to corrupt the .Bit file which is existing in Spartan 6 FPGA through the processor using .Bin file which is not byte-swapped for slave serial mode, but the FPGA is not configuring and DONE pin is not going to high. We probed the data pin on the oscilloscope some data is transmitting.

3 Replies
Xilinx Employee
Xilinx Employee
80 Views
Registered: ‎08-10-2008

回复: FPGA Configuration

Read the Status register first to determine where Spartan-6 is after the config.

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67 Views
Registered: ‎07-13-2018

回复: FPGA Configuration

Any protocol is required in FPGA spartan-6 for this method i.e, to configure FPGA from the processor, presently we are using EMIF interface between the processor and FPGA spartan-6.

Thanks.

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Xilinx Employee
Xilinx Employee
58 Views
Registered: ‎08-10-2008

回复: FPGA Configuration

No protocol. 

Check the timing diagram Figure 2-4, ug380.

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