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Registered: ‎05-13-2018

Full Reconfiguration from SPI flash using IPROG

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We are using KIntex UltraScale+ KU3P FPGA with a microblaze.

We implemented multiboot design that consist of 3 FPGA images: Gold, Silver1 & Silver2.

Each design located in different location in SPI flash memory. 0x0, 0x1000000 & 0x2200000

 

Another detail, maybe worth mentioning: Silver images are placed in flash together with their header, and WBSTAR value shifter on the length of this header (about 0x77 bytes).

Tried all with cash

 

Gold image – has software in BRAM that reads metadata from flash and issues IPROG to boot from one of the Silver images.

 

What we see is that FPGA always boots from the same image (Silver1), no matter what value I put in WBSTAR register before IPROG. I even tried illegal values.

BOOT STS value in this situation is always 0x105, meaning IPROG issued and image valid.

I have tried 2 IPROG sequences, both end with the same result.

 

IPROG sequences1

 

#define IPROG_JUMP_BITSTREAM_LENGTH     8
#define WBSTAR_LOC_BITSTREAM                   4

static u32 iprog_command_seq[IPROG_JUMP_BITSTREAM_LENGTH] =
               0xFFFFFFFF, /* Dummy Word */
               0xAA995566, /* Sync Word*/
               0x20000000, /* Type 1 NO OP */
               0x30020001, /* Write WBSTAR cmd */
               0xXXXXXXXX, /* Warm boot start address (Load the desired address) */
               0x30008001, /* Write CMD */
               0x0000000F, /* Write IPROG */
               0x20000000, /* Type 1 NO OP  */
};

 

IPROG sequences2

#define IPROG_JUMP_BITSTREAM_LENGTH     15
#define WBSTAR_LOC_BITSTREAM                   10

static u32 iprog_command_seq[IPROG_JUMP_BITSTREAM_LENGTH] =
{
                             0xAA995566, //Sync Word
                              0x20000000, //NOP
                              0x20000000, //NOP
                              0x3003E001, //BPI/SPI configuration option register
                              0x0000066C, //SPI Read Opcode (Quad Fast Read 32 bit, X4, 32 bit Addr)
                              0x30008001, //Write 1 word to CMD register (flip the 3 to a 0)
                              0x00000012, //BPI/SPI restart bitstream read
                              0x20000000, //NOP
                              0x20000000, //NOP
                              0x30020001, //Write to WBSTAR
                              0xXXXXXXXX, /* Warm boot start address (Load the desired address) */
                              0x30008001, //Write 1 word to CMD register
                              0x0000000F, //IPROG
                              0x20000000, //NOP
                              0x20000000, //NOP
};

To load the sequence using ICAP, I also tried 2 methods:

In both ICAP is in polled mode.

 

Method1 – from example provided by XILIX

/*****************************************************************************/
/**
*
* This function issues IPROG jump using the ICAP .
*
* @param            BaseAddress is the base address of the HwIcap instance.
* @param            IdCode is the iprog_address passed as parameter.
*
* @return            XST_SUCCESS if successful, otherwise XST_FAILURE
*
* @note               None
*
******************************************************************************/
u32 iprogJump(u32 BaseAddress) //,  u32 *IdCode
{
               u32 Index;
               u32 Retries;
               /*
               * Write command sequence to the FIFO
               */

               for (Index = 0; Index < IPROG_JUMP_BITSTREAM_LENGTH; Index++) {

                              XHwIcap_WriteReg(BaseAddress, XHI_WF_OFFSET, iprog_command_seq[Index]);
               }
               /*
               * Start the transfer of the data from the FIFO to the ICAP device.
               */

               XHwIcap_WriteReg(BaseAddress, XHI_CR_OFFSET, XHI_CR_WRITE_MASK);

               /*
               * Poll for done, which indicates end of transfer
               */
               Retries = 0;
               while ((XHwIcap_ReadReg(BaseAddress, XHI_SR_OFFSET) &
                                             XHI_SR_DONE_MASK) != XHI_SR_DONE_MASK) {

                              Retries++;
                              if (Retries > XHI_MAX_RETRIES) {

                                             /*
                                             * Waited to long. Exit with error.
                                             */
                                             printf("\r\niprogJump failed- retries  \
                                             failure. \r\n\r\n");

                                             return XST_FAILURE;                               }                }                /*                * Wait till the Write bit is cleared in the CR register.                */                while ((XHwIcap_ReadReg(BaseAddress, XHI_CR_OFFSET)) & XHI_CR_WRITE_MASK);                /*                * Write to the SIZE register. We want to readback one word.                */                XHwIcap_WriteReg(BaseAddress, XHI_SZ_OFFSET, HWICAP_IDCODE_SIZE);                /*                * Start the transfer of the data from ICAP to the FIFO.                */                XHwIcap_WriteReg(BaseAddress, XHI_CR_OFFSET, XHI_CR_READ_MASK);                /*                * Poll for done, which indicates end of transfer                */                Retries = 0;                while ((XHwIcap_ReadReg(BaseAddress, XHI_SR_OFFSET) & XHI_SR_DONE_MASK) != XHI_SR_DONE_MASK) {                               Retries++;                               if (Retries > XHI_MAX_RETRIES) {                                              /*                                              * Waited too long. Exit with error.                                              */                                              return XST_FAILURE;                               }                }                return XST_SUCCESS; }

Method2 – wrote it by myself. Basically, very similar.

 

/*****************************************************************************/
/**
*
* This function issues IPROG jump using the ICAP .
*
* @param            BaseAddress is the base address of the HwIcap instance.
* @param            IdCode is the iprog_address passed as parameter.
*
* @return            XST_SUCCESS if successful, otherwise XST_FAILURE
*
* @note               None
*
******************************************************************************/

u32 iprogJump(u32 BaseAddress) //,  u32 *IdCode
{
               u32 Retries;
               XHwIcap_FlushFifo(&g_icap);
               XHwIcap_DeviceWrite(&g_icap,iprog_command_seq,IPROG_JUMP_BITSTREAM_LENGTH);
               /*
               * Poll for done, which indicates end of transfer
               */

               Retries = 0;

               while ((XHwIcap_ReadReg(BaseAddress, XHI_SR_OFFSET) &
                                             XHI_SR_DONE_MASK) != XHI_SR_DONE_MASK) {
                              Retries++;
                              if (Retries > XHI_MAX_RETRIES) {
                                             /*
                                             * Waited too long. Exit with error.
                                             */
                                             return XST_FAILURE;
                              }
               }

               return XST_SUCCESS;
}

 

In both methods: I call this procedure from main with the correct iprog_address (verified in debug)

/*****************************************************************************/
/**
*
* This function issues IPROG to the target device.
*
* @param            iprog_address is the Jump address for the ICAP
* @param            BaseAddress is the base address of the HwIcap instance.
* @return            XST_SUCCESS if successful, otherwise XST_FAILURE
*
* @note               None
*
******************************************************************************/

INT8U ISSUE_IPROG(INT32U iprog_address)
{
               int Status;
               /*
               * Run the HwIcap Low Level example, specify the Base Address
               * generated in xparameters.h.
               */

//            xil_printf("\n*****IPROG ISSUED*****\r\n");
               iprog_command_seq[WBSTAR_LOC_BITSTREAM] = iprog_address; //Load the Warm Boot Address
               Status = iprogJump(HWICAP_BASEADDR); //, iprog_address
               if (Status != XST_SUCCESS) {
                              return XST_FAILURE;
               }

               return XST_SUCCESS;
}

 

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Moderator
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372 Views
Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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Hi ,

can you run another test? Erase the silver images and let the golden boot. Do you see fallback? Because IPROG will be issued and there is no image at that address.
can you share the bitstream properties which you have in golden image?
Next if the flash size is greater then 128 MB then please enable the BITSTREAM.CONFIG.SPI_32BIT_ADDR property in your design. This will enable to read the 32 bit address location.
Also command which you have used for generating the mcs file.
Here is the AR for bitstream properties https://www.xilinx.com/support/answers/54073.html
Thanks
Harshit




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Moderator
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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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Hi ,

can you run another test? Erase the silver images and let the golden boot. Do you see fallback? Because IPROG will be issued and there is no image at that address.
can you share the bitstream properties which you have in golden image?
Next if the flash size is greater then 128 MB then please enable the BITSTREAM.CONFIG.SPI_32BIT_ADDR property in your design. This will enable to read the 32 bit address location.
Also command which you have used for generating the mcs file.
Here is the AR for bitstream properties https://www.xilinx.com/support/answers/54073.html
Thanks
Harshit




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364 Views
Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Thank you for the reply.
I'll start step-by-step:
Here is how I create an MCS
write_cfgmem -force -format mcs -size 64 -interface SPIx4 -loadbit {up 0x00000000 "goldImage.bit" } -loaddata {up 0x01000000 "lprImage_cs.bit" up 0x02200000 "lpr_image2506.bit" up 0x03510000 "clean1k.bin" up 0x03520000 "clean1k.bin" } -file "$script_path/Export/LPR_production.mcs"
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Also tried to remove header in this way:
write_cfgmem -force -format mcs -size 64 -interface SPIx4 -loadbit {up 0x00000000 "goldImage.bit" up 0x01000000 "lprImage_cs.bit" up 0x02200000 "lpr_image2506.bit"} -loaddata { up 0x03510000 "clean1k.bin" up 0x03520000 "clean1k.bin" } -file "$script_path/Export/LPR_production.mcs"
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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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Thanks, So both the images gives the same results?
Command seems to be ok. Now share the properties.
Also I hope you have tested these images individually. Just to make sure it works without multiboot constraints.

Thanks
harshit
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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You asked to make a test: erasing both designs and and try to jump.
Did that, it took about 45 seconds, but the FPGA got back to GOLD image.
The weird this is that I got BOOTSTS value = 0x00000105, after jumping to nothing.
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Sure, every image was tested separately.
I'm having trouble extracting bitstream properties. Can I take it from the BIT file itself or from the project?
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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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open the implemented design first and run the below command:

report_property -all [current_design]

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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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It's not that the images behave the same, it that FPGA allway loads the firstimage (at 0x1000000) disregarding the value of WBSTAR
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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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What if you erase the image at 0x1000000 and keep the 2nd silver image? Does it show fallback?

Harshit
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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No. It goes to the second image
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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I just read about WBSTAR value should not be the exact address in flash. should it be bit-swapped? Should there be shift-right on 1 byte?

I read it about Series 7. is it same in Kintex Ultrascale+?

 

https://forums.xilinx.com/t5/Configuration/Multiboot-and-SPI-32bit-addressing-mode/td-p/394107

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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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No we support 32 bit addressing in US/US+ devices. You can refer to XAPP1296 which uses the same ICAP approach.
https://www.xilinx.com/support/documentation/application_notes/xapp1296-multiboot-fallback-icap.pdf
Please share the properties as well.
So without silver 1 image Silver 2 loads. That's correct.
Without Silver images golden boots but fallback is not seen in status registers. Something is wrong in here.

Can you try to use bit swapping for ICAP module? See if that sequence works for you: We have discussed this on page#141 in UG#570. Just make sure to bit swap your WBSTAR location as well.
0xFFFFFFFF, /* Dummy Word */
0x5599AA66, /* Sync Word*/
0x04000000, /* Type 1 NO OP */
0x0C400080, /* Write WBSTAR cmd */
0x80000000, /* Warm boot start address (Load the desired address) */ it should be 80000000 for 01000000.
0x0C000180, /* Write CMD */
0x000000F0, /* Write IPROG */
0x04000000, /* Type 1 NO OP */

};

Harshit

 
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Thank you. Just to make it 100% clear ...
bit-swap is ICAPE parameter. I need to set this parameter ON and (manually) bit-swap WBSTAR value on image that has it. only WBSTAR, right?
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Registered: ‎06-05-2013

Re: Full Reconfiguration from SPI flash using IPROG

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If I remember correctly then HWICAP does the bit swapping for you. But if you are instantiating ICAPE3 primitive then you have to manually do it. It would be good if you can refer to the XAPP, it seems you are using similar approach. Also share the design properties. Something small might be missing.
-
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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About the XAPP, I read it multiple times. I think that I'm doing everything like they do.

Design properties will take some time for me, because I only make the software. It will be shared in 12 hours.

"But if you are instantiating ICAPE3 primitive then you have to manually do it." - what do you mean by that? Is there a chance that from microblaze I'm using ICAPE3 without using ICAP?

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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Read through PG134 - describing ICAP. According to PG134, non of the possible ICAP configuration include bit-swapping option. Did I miss something?
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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Now, I have the property list.

report_property -all [current_design]

Property                                    Type     Read-only  Value

BITSTREAM.AUTHENTICATION.AUTHENTICATE       enum     false     

BITSTREAM.AUTHENTICATION.RSAPRIVATEKEYFILE  file     false     

BITSTREAM.CONFIG.BPI_1ST_READ_CYCLE         enum     false     

BITSTREAM.CONFIG.BPI_PAGE_SIZE              enum     false     

BITSTREAM.CONFIG.BPI_SYNC_MODE              enum     false     

BITSTREAM.CONFIG.CCLKPIN                    enum     false     

BITSTREAM.CONFIG.CONFIGFALLBACK             enum     false      ENABLE

BITSTREAM.CONFIG.CONFIGRATE                 enum     false      31.9

BITSTREAM.CONFIG.D00_MOSI                   enum     false     

BITSTREAM.CONFIG.D01_DIN                    enum     false     

BITSTREAM.CONFIG.D02                        enum     false     

BITSTREAM.CONFIG.D03                        enum     false     

BITSTREAM.CONFIG.DCIUPDATEMODE              enum     false     

BITSTREAM.CONFIG.DONEPIN                    enum     false     

BITSTREAM.CONFIG.EXTMASTERCCLK_EN           enum     false     

BITSTREAM.CONFIG.INITPIN                    enum     false     

BITSTREAM.CONFIG.INITSIGNALSERROR           enum     false     

BITSTREAM.CONFIG.M0PIN                      enum     false     

BITSTREAM.CONFIG.M1PIN                      enum     false     

BITSTREAM.CONFIG.M2PIN                      enum     false     

BITSTREAM.CONFIG.NEXT_CONFIG_ADDR           hex      false     

BITSTREAM.CONFIG.NEXT_CONFIG_REBOOT         enum     false     

BITSTREAM.CONFIG.OVERTEMPSHUTDOWN           enum     false     

BITSTREAM.CONFIG.PERSIST                    enum     false     

BITSTREAM.CONFIG.PROGPIN                    enum     false     

BITSTREAM.CONFIG.PUDC_B                     enum     false     

BITSTREAM.CONFIG.RDWR_B_FCS_B               enum     false     

BITSTREAM.CONFIG.REVISIONSELECT             enum     false     

BITSTREAM.CONFIG.REVISIONSELECT_TRISTATE    enum     false     

BITSTREAM.CONFIG.SELECTMAPABORT             enum     false     

BITSTREAM.CONFIG.SPI_32BIT_ADDR             enum     false      YES

BITSTREAM.CONFIG.SPI_BUSWIDTH               enum     false      4

BITSTREAM.CONFIG.SPI_FALL_EDGE              enum     false     

BITSTREAM.CONFIG.TCKPIN                     enum     false     

BITSTREAM.CONFIG.TDIPIN                     enum     false      

BITSTREAM.CONFIG.TDOPIN                     enum     false     

BITSTREAM.CONFIG.TIMER_CFG                  hex      false     

BITSTREAM.CONFIG.TIMER_USR                  hex      false     

BITSTREAM.CONFIG.TMSPIN                     enum     false     

BITSTREAM.CONFIG.UNUSEDPIN                  enum     false     

BITSTREAM.CONFIG.USERID                     hex      false     

BITSTREAM.CONFIG.USR_ACCESS                 string   false     

BITSTREAM.ENCRYPTION.ENCRYPT                enum     false     

BITSTREAM.ENCRYPTION.ENCRYPTKEYSELECT       enum     false     

BITSTREAM.ENCRYPTION.KEY0                   hex      false     

BITSTREAM.ENCRYPTION.KEYFILE                file     false     

BITSTREAM.ENCRYPTION.KEYLIFE                int      false     

BITSTREAM.ENCRYPTION.OBFUSCATEKEY           enum     false     

BITSTREAM.ENCRYPTION.RSAKEYLIFEFRAMES       int      false     

BITSTREAM.ENCRYPTION.STARTIV0               hex      false     

BITSTREAM.ENCRYPTION.STARTIVOBFUSCATE       hex      false     

BITSTREAM.GENERAL.COMPRESS                  enum     false     

BITSTREAM.GENERAL.CRC                       enum     false     

BITSTREAM.GENERAL.DEBUGBITSTREAM            enum     false     

BITSTREAM.GENERAL.DISABLE_JTAG              enum     false     

BITSTREAM.GENERAL.JTAG_SYSMON               enum     false     

BITSTREAM.GENERAL.MCAP_ACCESS               enum     false     

BITSTREAM.GENERAL.PERFRAMECRC               enum     false     

BITSTREAM.GENERAL.SYSMONPOWERDOWN           enum     false     

BITSTREAM.READBACK.ACTIVERECONFIG           enum     false     

BITSTREAM.READBACK.ICAP_SELECT              enum     false     

BITSTREAM.READBACK.SECURITY                 enum     false     

BITSTREAM.STARTUP.DONE_CYCLE                enum     false     

BITSTREAM.STARTUP.GTS_CYCLE                 enum     false     

BITSTREAM.STARTUP.GWE_CYCLE                 enum     false     

BITSTREAM.STARTUP.LCK_CYCLE                 enum     false      

BITSTREAM.STARTUP.MATCH_CYCLE               enum     false     

BMM_FILE                                    string   false     

CFGBVS                                      enum     false     

CLASS                                       string   true       design

CONFIG_MODE                                 enum     false      SPIx4

CONFIG_VOLTAGE                              enum     false     

CONSTRSET                                   fileset  true       constrs_1

DEFAULT_IOSTANDARD                          string   false     

HD.ISOLATED                                 bool     false     

HD.OVERRIDE_PERSIST                         bool     false     

HD.PARTITION                                bool     false     

HD.RECONFIGURABLE                           bool     false     

HD.TANDEM_BITSTREAMS                        enum     false     

IS_BLOCK                                    bool     true       0

IS_PRSHELL_DESIGN                           bool     true      

KEEP_COMPATIBLE                             string*  false     

KEEP_HIERARCHY                              enum     false     

MLO_VERSION_NUMBER                          string   false      2018.1_9

NAME                                        string   true       impl_2

NEEDS_REFRESH                               bool     true       0

NEEDS_SAVE                                  bool     true       0

PART                                        part     true       xcku3p-ffva676-2-e

POST_CRC                                    enum     false     

POST_CRC_ACTION                             enum     false     

POST_CRC_FREQ                               int*     false     

POST_CRC_INIT_FLAG                          enum     false     

POST_CRC_SOURCE                             enum     false     

SPEED_LABEL                                 string   true      

SPEED_LEVEL_ID                              string   true      

SPEED_LEVEL_ID_DATE                         string   true       

SRCSET                                      fileset  true       sources_1

SUSPEND_FILTER                              string   false     

TOP                                         string   true       design_1_wrapper

XLNX_PROJ_DIR                               string   false

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Registered: ‎05-13-2018

Re: Full Reconfiguration from SPI flash using IPROG

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Thank you harshit!
This was very helpful. You were right all the time.
BITSTREAM.CONFIG.SPI_32BIT_ADDR -- was disabled.
I did enable that in Gold boot, but it was disabled in both Silver boot BIT files.