We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Visitor my_xilinx1
Registered: ‎03-25-2018

How to update the FPGA configuration flash in filed (Artix 7)



I am using the Artix 7 FPGA with No RAM attached to it.

The FPGA is configured using Micron quad SPI flash.

The FPGA is connected to external CPU with 16 bit parallel peripheral bus (with read/write/Cs/address )


My purpose is to be able to update the firmware in the configuration nor flash at customer site, using multi boot.

As a start I need your help to decide what is the best/fastest way to do that (without the multi boot just single boot).

Since I cannot use the micro blaze, since there is no external memory and the current utilization is ~60% I thought of the following scheme:


To write Parallel-to-AXI block plus buffer plus control registers code in which the CPU will write chunks of the BIT file to the buffer, an internal block of control will take the buffer content and burn it in the appropriate location using existing IP  (AXI_Quad_SPI) to the configuration flash.

 Do you have better Idea to implement this?

Can you please refer me to known IPs or Documents that can be helpful?



0 Kudos
1 Reply
Scholar dgisselq
Registered: ‎05-21-2015

Re: How to update the FPGA configuration flash in filed (Artix 7)


I have written something very similar to what you describe.

Using only a serial port, as opposed to the parallel port you describe, I can write data to an Artix-7 FPGA (Digilent's Arty-A7 design).  The serial port goes into a serial to wishbone bridge.  From that bridge I can then write to the flash.  Once the write to the flash is complete, I can then use the ICAPE2 port to restart the FPGA into whichever configuration I wish to place it into using the warm boot register startup WBSTAR.  Later, reading from the ICAPE2 port, I can determine whether or not the new configuration  succeeded successfully.

You can find the code to do this within my OpenArty project on github.  Particular files to draw your attention to are the micron flash controller, eqspiflash.v, the ICAPE2 controller, wbicapetwo.v, and software flash driver, flashdrvr.cpp, and the flash simulation, qspiflash.cpp.

You should be able to simulate the entire operation with those files to make certain of your success before you actually deploy your idea--if you find them valuable to you.


0 Kudos