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Adventurer
Adventurer
579 Views
Registered: ‎07-18-2011

Problem programming config SPI flash without Vivado/SDK JTAG

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I need to program the configuration SPI flash for an Artix without using Vivado/SDK JTAG.   My board has an MCU that is connected to the SPI flash so it can read/write the flash while keeping the FPGA in reset.

I made a configuration bin file using the Vivado Generate Memory Configuration File tool, and Vivado Hardware Manager programs the SPI flash and it boots properly on powerup.   However, if I program the exact same binary file into flash using the MCU, the boot process never starts on powerup.  The FPGA bitfile configuration doesn't complete (DONE doesn't go high).

I am able to read the SPI flash in both cases and send the contents to a file for comparison, and the two loads seem to be identical, at least to the first 6,400,000 bytes I read and logged.

Here's the odd part: If I don't erase the SPI flash using Vivado Hardware Manager first, the MCU program load works fine, but if I do a full erase using Vivado and then reprogram using the MCU, it won't configure on powerup.   The MCU file sender program allegedly does a full erase using the BE 0xC7 bulk erase command, but this is somehow either not working, or it is different from what Vivado is doing with a full chip erase.

Is there something special Vivado does when programming the SPI flash, or am I missing something?

Any help would be greatly appreciated.

 

 

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Moderator
Moderator
437 Views
Registered: ‎06-05-2013

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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Perfect! This is something I expected. Now refer to the flash datasheet for programming this quad enable bit. This bit has to programmed by the user.

For example for this flash: S25FS128S 

sf.JPG 

Thanks

Harshit

 

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7 Replies
Xilinx Employee
Xilinx Employee
539 Views
Registered: ‎08-10-2008

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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Use Vivado to erase flash, and then use MCU to program, at last, use Vivado to verify and readback. 

Check what Vivado reports. Maybe the MCU reading and writing both have some issues.

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Adventurer
Adventurer
501 Views
Registered: ‎07-18-2011

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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@iguo ,

Brilliant suggestion, thanks!

Now for the strange part - I did as you suggested, an entire configuration memory erase using Vivado Hardware Manager, then programmed the flash with the MCU, then verified using Vivado Hardware manager.   The MCU load verified 100%, but it still won't configure and boot on powerup!   

Next, I did a readback of both the good and bad loads, and wrote them out to a file in binary format.   As near as I can tell, they look identical, but I can't do a file compare on binary files.

After that, I programmed the bad load full-chip readback binary file into the flash using Vivado Hardware manager.   It boots and works fine!

How can the two SPI flash loads appear to be identical yet only work when programmed with the Vivado tools, or it will also work if it has been programmed previously with Vivado tools and full erase with the Vivado tools has not been done?   It's as if there is something non-volatile being programmed into the FPGA itself during the SPI flash programming process.

On the non-working MCU load, I see the SPI flash chip select go low, and I see the ~3MHz startup CCLK come on, but it never switches to the 22MHz QSPI load clock, the 3MHz startup clock just keeps going until I power off.   The good Vivado load switches clocks and runs as expected.

By the way, I am using Quad SPI mode, with the following constraints:

set_property BITSTREAM.GENERAL.COMPRESS         True     [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE         22         [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH         4         [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR     Yes     [current_design]
set_property BITSTREAM.STARTUP.DONE_CYCLE         4         [current_design]
set_property BITSTREAM.STARTUP.STARTUPCLK        Cclk    [current_design]

 

Any further ideas for debug of this problem?   

 

 

Moderator
Moderator
481 Views
Registered: ‎06-05-2013

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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Thanks for running the tests. This seems to be a case where your programmer(MCU) is missing the quad enable bit. Vivado is setting that correctly and you are able to boot in SPIx4 mode.

For testing this, run a test with SPIX1 bitstream (or bin/mcs) settings which is by default. And confirm if that is working. .
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 1 [current_design]
BITSREAM constraint is for write_bitstream process to ensure correct x4 (BUSWIDTH 4 ) read commands are included into bit file.

Also add the following constraint if missing:

set_property config_mode SPIx4 [current_design] # for this test try with SPIX1

The CONFIG_MODE property defines which device configuration mode or modes to use for pin allocations, DRC reporting, and bitstream generation.

Please try SPIx1 and share the findings.

Thanks
harshit
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Adventurer
Adventurer
443 Views
Registered: ‎07-18-2011

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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@harshit , @iguo

Okay, now we are getting somewhere!   Thank you for your help!

I created a binary configuration file using Vivado Write Memory Configuration File tool with Interface set to SPIx1, BIN format, with bit-swapping disabled, as required by SPI.  I configured for SPIx1 mode using the following constraints and it worked, both Vivado Hardware Manager and my MCU file sender program:

set_property CONFIG_MODE SPIx1 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS True [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 22 [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 1 [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR Yes [current_design]
set_property BITSTREAM.STARTUP.DONE_CYCLE 4 [current_design]
set_property BITSTREAM.STARTUP.STARTUPCLK Cclk [current_design]

 

I then created a configuration file using Vivado Write Memory Configuration File tool with Interface set to SPIx4, BIN format, bit-swapping disabled, and configured for SPIx4 mode using the following constraints, and it still failed to boot with my MCU file sender program:

set_property CONFIG_MODE SPIx4 [current_design]
set_property BITSTREAM.GENERAL.COMPRESS True [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 22 [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR Yes [current_design]
set_property BITSTREAM.STARTUP.DONE_CYCLE 4 [current_design]
set_property BITSTREAM.STARTUP.STARTUPCLK Cclk [current_design]

Is there something else that needs to be set for quad-SPI configuration mode to boot?

Moderator
Moderator
438 Views
Registered: ‎06-05-2013

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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Perfect! This is something I expected. Now refer to the flash datasheet for programming this quad enable bit. This bit has to programmed by the user.

For example for this flash: S25FS128S 

sf.JPG 

Thanks

Harshit

 

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Highlighted
Xilinx Employee
Xilinx Employee
416 Views
Registered: ‎08-10-2008

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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Great debugging.

As for Quad bit enable, here is a article about how Vivado does it FYI: https://www.xilinx.com/support/answers/61067.html

 

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Adventurer
Adventurer
406 Views
Registered: ‎07-18-2011

回复: Problem programming config SPI flash without Vivado/SDK JTAG

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@iguo @harshit

Since that QUAD enable bit is non-volatile in the SPI flash itself, that explains why the Vivado-programmed version worked on powerup, but my MCU-programmed version didn't work after a full erase, but the MCU-programmed version would work as long as I didn't do a full erase first. 

The Vivado Hardware Manager programs that bit as part of the SPI flash programming procedure, and a full-erase clears it, but my MCU program just loads the SPI flash, and doesn't program that non-volatile register bit, so the files matched and verified, but it was the configuration registers in the SPI flash that weren't the same!

Excellent!  Now I have a complete understanding of a very unusual debug issue. 

Thank you both so much!