UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Explorer
Explorer
288 Views
Registered: ‎09-05-2015

Running two Vivado(two FPGAs) on one PC

Hi, I am using two VC707 evaluation boards.

I want to use one Vivado to program FPGA_0 and another Vivado to program FPGA_1.

 

I powered on two FPGAs, and two JTAG cables and two UART cables are connected both to PCs and FPGAs.

Then, I got

ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/210203A7D704A.
Check cable connectivity and that the target board is powered up then
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
ERROR: [Common 17-39] 'refresh_hw_target' failed due to earlier errors.

 

 

I think the problem is that both target is connected to localhost:3121 as you can see from the screenshots below.

 

On TCL console of Vivado, I tried

hw_server -s tcp:: 3122

but it seemed to take forever. It keeps saying "running." I tried hw_server -s tcp:: 3122 on Xilinx Software Command Line and I had an error of cannot create listening port: socket bind error.

0.PNG

 

1.PNG

 

How can I resolve this issue?

 

Thanks.

0 Kudos
8 Replies
Xilinx Employee
Xilinx Employee
280 Views
Registered: ‎08-10-2008

回复: Running two Vivado(two FPGAs) on one PC

The screenshots are as expected with one chain open and another chain closed. You can operate on the open chain, then close it and open the other one.

So error poped out when you tried to access the open chain right? If you remove the closed 710A chain, can this 704A chain run as expected? Try to test this first.

------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
---------------------------------------------------------------------------------------------------------
0 Kudos
Explorer
Explorer
278 Views
Registered: ‎09-05-2015

回复: Running two Vivado(two FPGAs) on one PC

@iguo 

Thanks for the reply.

 

Yes, this is working with one target.

3.PNG

 

0 Kudos
Xilinx Employee
Xilinx Employee
260 Views
Registered: ‎08-10-2008

回复: Running two Vivado(two FPGAs) on one PC

OK. Can you post the complete log in the console window for the whole process? Start from the very beginning 'open_hw' please.

------------------------------------------------------------------------------------------------------------
Don't forget to reply, kudo, and accept as solution.
---------------------------------------------------------------------------------------------------------
0 Kudos
Highlighted
Explorer
Explorer
243 Views
Registered: ‎09-05-2015

回复: Running two Vivado(two FPGAs) on one PC

@iguo 

Now somehow it fails with only one FPGA. The failure log is like below.

 

open_hw
connect_hw_server
INFO: [Labtools 27-2285] Connecting to hw_server url TCP:localhost:3121
INFO: [Labtools 27-2222] Launching hw_server...
INFO: [Labtools 27-2221] Launch Output:

****** Xilinx hw_server v2018.3
**** Build date : Dec 7 2018-00:40:27
** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.


open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210203A7D704A
ERROR: [Labtools 27-2269] No devices detected on target localhost:3121/xilinx_tcf/Digilent/210203A7D704A.
Check cable connectivity and that the target board is powered up then
use the disconnect_hw_server and connect_hw_server to re-register this hardware target.
ERROR: [Common 17-39] 'open_hw_target' failed due to earlier errors.

0 Kudos
Explorer
Explorer
235 Views
Registered: ‎09-05-2015

回复: Running two Vivado(two FPGAs) on one PC

Below is the log when it's working.

Now one FPGA is working.

 

open_hw_target
INFO: [Labtoolstcl 44-466] Opening hw_target localhost:3121/xilinx_tcf/Digilent/210203A7D710A
set_property PROGRAM.FILE {C:/Users/DJP.DESKTOP-HO8RGT7/Documents/VivadoPrj/190320_AXILITE_LED_test/190320_AXILITE_LED_test.runs/impl_1/LED_test_wrapper.bit} [get_hw_devices xc7vx485t_0]
current_hw_device [get_hw_devices xc7vx485t_0]
refresh_hw_device -update_hw_probes false [lindex [get_hw_devices xc7vx485t_0] 0]
INFO: [Labtools 27-1434] Device xc7vx485t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.
set_property PROBES.FILE {} [get_hw_devices xc7vx485t_0]
set_property FULL_PROBES.FILE {} [get_hw_devices xc7vx485t_0]
set_property PROGRAM.FILE {C:/Users/DJP.DESKTOP-HO8RGT7/Documents/VivadoPrj/190320_AXILITE_LED_test/190320_AXILITE_LED_test.runs/impl_1/LED_test_wrapper.bit} [get_hw_devices xc7vx485t_0]
program_hw_devices [get_hw_devices xc7vx485t_0]
INFO: [Labtools 27-3164] End of startup status: HIGH
program_hw_devices: Time (s): cpu = 00:00:11 ; elapsed = 00:00:12 . Memory (MB): peak = 1900.930 ; gain = 0.000
refresh_hw_device [lindex [get_hw_devices xc7vx485t_0] 0]
INFO: [Labtools 27-1434] Device xc7vx485t (JTAG device index = 0) is programmed with a design that has no supported debug core(s) in it.

0 Kudos
Moderator
Moderator
172 Views
Registered: ‎06-05-2013

回复: Running two Vivado(two FPGAs) on one PC

Can you try to set one device on 3122 port with the cable identifier.

hw_server -stcp::3122 -e "set jtag-port-filter xilinx_tcf/Digilent/210203A7D710A"

prot 3121 would be for your other cable.

Thanks
harshit
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos
Explorer
Explorer
146 Views
Registered: ‎09-05-2015

回复: Running two Vivado(two FPGAs) on one PC

@harshit 

Thanks for the reply. I tried the command on Tcl Console, and it says 

Cannot create listening port: Socket bind error.

 

I tried to program two FPGAs from one PC, but then changed my mind to program two FPGAs seperately from two PCs.

I think I need to seperate one FPGA from another but it's not working because of same issue that I stated in this thread. People are having similar issues (https://forums.xilinx.com/t5/Evaluation-Boards/No-JTAG-connectivity-when-KC705-to-KC705-connected-through-FMC/m-p/954622#M21323).

 

 

jtag block diagram.PNG

 

I think I need to close U27 and U28 to bypass FMCs.

 

(* dont_touch = "true" *) wire FMC1_HPC_PRSNT_M2C_B;
(* dont_touch = "true" *) wire FMC2_HPC_PRSNT_M2C_B;
assign FMC1_HPC_PRSNT_M2C_B = 0; // low active
assign FMC2_HPC_PRSNT_M2C_B = 0; // low active

 

I did something like above in the verilog design and hooked FMC1_HPC_PRSNT_M2C_B with AM31 and FMC2_HPC_PRSNT_M2C_B with AG32. But it's still not working. Is this how I am supposed to do?

Any suggestions?

 

0 Kudos
Moderator
Moderator
127 Views
Registered: ‎06-05-2013

回复: Running two Vivado(two FPGAs) on one PC


@moon5756 wrote:

@harshit 

Thanks for the reply. I tried the command on Tcl Console, and it says 

Cannot create listening port: Socket bind error.

 

Please make sure that you are closing the previously running hw_server before running another one. You might quit Vivado but there are chances that HW_Server is still running in the background. If it is windows check the task manager. kill those hw_server and use the below command to create 3122 port. 

 
-------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------
0 Kudos