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Visitor ndnsoulja
Visitor
107 Views
Registered: ‎10-24-2018

Set efuse control bit, now I cant flash my SPI

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I was trying to setup encryption on my VCU118 board and I set the CFS_AES_ONly bit in FUSE_CNTL thining this would only allow for encrypted bitstreams to be configured.  But now, I can't load a build into my VCU118 since I set the CFG_AES_ONLY bit in my eFuse. 

Reading furthur into xapp12399 and there is a caution that says CFS_AES_Only set to 1 will prevent Vivado tools Indirect SPI/BPI flash programming flow. All I wanted the FPGA to do was not allow unencrypted bitstreams, but now it seems like I can't program the SPI because I set this bit. 

Is there any other way for me to program the SPI? maybe with the Zynq thats on this board?

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1 Solution

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Xilinx Employee
Xilinx Employee
35 Views
Registered: ‎06-06-2018

Re: Set efuse control bit, now I cant flash my SPI

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Hi @ndnsoulja ,

As i said in my First post, If CFS_AES_Only is set to 1, then External configuration ports are blocked from accessing the configuration memory(Flash) after initial configuration. So through Vivado you cant program the flash.

The only way to program the flash is to remove the Flash/ use flywires to acces ports of flash and the use 3rd party programmers to program the flash.

Note : you need to program the flash with encrypted bitsream whose key is stored in FPGA.

 

Anyhow your FPGA is safe since you have set CFS_AES_Only to 1. Only Encrypted bitstream (who's key stored in FPGA) can only be programmed to FPGA, since If this bit is programmed to 1, the device cannot be used unless the AES key is known. So unencrypted will not be loaded to FPGA, since it looks for Key.

 

Hope you are now clear.

 

Regards,

Deepak D N

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Please reply or give kudo or Accept as a Solution.

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3 Replies
Xilinx Employee
Xilinx Employee
62 Views
Registered: ‎06-06-2018

Re: Set efuse control bit, now I cant flash my SPI

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Hi @ndnsoulja ,

No you cannot program the Flash. Since External configuration ports are blocked from accessing the configuration memory after initial
configuration if FUSE_CNTL[1] is programmed(i.e CFS_AES_Only set to 1).

 

Workaround : you can use 3rd party  programer to program the flash. 

 

Xilinx doesnt recommend to do since it will void your warranty.

Regards,

Deepak D N

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PLease dont forget to kudo or Accept as a Solution.

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Visitor ndnsoulja
Visitor
40 Views
Registered: ‎10-24-2018

Re: Set efuse control bit, now I cant flash my SPI

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@ddn I wanted to restrict my FPGA to only Encrypted builds. I thought setting  CFS_AES_Only to 1 would do that. Why does enabling this also cause indirect programming to be disabled? Is there another method to only allow Encrypted builds to be loaded and not unEncrypted builds? 

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Xilinx Employee
Xilinx Employee
36 Views
Registered: ‎06-06-2018

Re: Set efuse control bit, now I cant flash my SPI

Jump to solution

Hi @ndnsoulja ,

As i said in my First post, If CFS_AES_Only is set to 1, then External configuration ports are blocked from accessing the configuration memory(Flash) after initial configuration. So through Vivado you cant program the flash.

The only way to program the flash is to remove the Flash/ use flywires to acces ports of flash and the use 3rd party programmers to program the flash.

Note : you need to program the flash with encrypted bitsream whose key is stored in FPGA.

 

Anyhow your FPGA is safe since you have set CFS_AES_Only to 1. Only Encrypted bitstream (who's key stored in FPGA) can only be programmed to FPGA, since If this bit is programmed to 1, the device cannot be used unless the AES key is known. So unencrypted will not be loaded to FPGA, since it looks for Key.

 

Hope you are now clear.

 

Regards,

Deepak D N

---------------------------------------------------------------------------------

Please reply or give kudo or Accept as a Solution.

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