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Visitor lightphase
Visitor
5,493 Views
Registered: ‎05-08-2014

Tandem-PCIe configuration for 4 - 5 Kintex-7 series FPGA with individual user logic ?

Hi, 

 

I'm using 4 - 5 Kintex-7 XC7K325T FPGAs in my design. The FPGAs will be using the Integrated Block for PCIe for communicating with an external processor. Since it is a requirement that the PCIe links must be up within 120ms after power-up, I'm considering using the Tandem-PCIe approach. 

 

As I understand the Tandem-PCIe uses 2 stages for configuration, first the PCIe functionality is configured from a memory device, then the rest of the user logic is downloaded using the PCIe link.

 

What I'm wondering is this:

 

can I configure 2 or more FPGAs using a single memory device for the 1.st stage of the Tandem-PCIe (configuring the PCIe links) and then for the 2. stage use the PCIe links in order download individual user data for each device? This would avoid having to use a individual configuration memory for each FPGA, since the FPGAs are going to provide different user functionality.

 

Is this approach viable, if not, then what other options do I have?

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