01-28-2019 11:25 PM
just discovered some strange behavior in my VHDL Cosimulation with System Generator.
I'm using Vivado 2017.4 with Matlab/Simulink 2017b and "Questa Sim-64 vsim 10.6c_1 Simulator 2017.09 ".
I have a simple VHDL Model in a Black Box that takes data from my Matlab Script and sends them to the output.
The Code makes a Multiplication by 1, so the values do not change, only datawith doubles.
The Values that appeared in Questa made no sense at first glance. But it was strange that the Hex values in the Waveform view were just made from zeros and ones. So I also converted my Input data in matlab to hex and binary to compare these with the suspicious Questa Values.
Result: Questa was taking the four binary LSBs of my 16 Bit input and interpreted these bits as hexadecimal values.
This Input value 0.0622 in FIX_16_14 notation becomes HEX: '03fb' or BIN: '0000001111111011'
It appears in Questa as 16'h1001. (Compare with the four rightmost bits of the binary representation)
This holds for all Input values.
The Output then is simulated correctly and with respect to the fixedpoint notation FIX_32_28 appears also unchanged in the Matlab workspace.
See the sources in the attached ZIP-file. Simulation can be started with sim_hdl_not.m .
The Simulink Model contains two "To Workspace" blocks which were added to analyze the error. They show correct values, but the behavior is still wrong. It wors the same with or without these blocks.
Anyone has a clue what causes this?
01-30-2019 07:26 AM
Can you please try the same with ModelSIM simulator. System Generator supports only ModelSIM as external simulator for HDL Co-Simulation. The compilation libraries might be different for these two simultors.
Please try on ModelSIM and let me know.
01-31-2019 12:26 AM - edited 01-31-2019 12:27 AM
thanks for the quick response.
Unfortunately I don't have an instance of Modelsim available on our system.
I relied on UG973 which also lists the Questa Simulator, and as you might know, this is an advanced version of Modelsim. But I agree, that there might be slight differences that can cause the problem.
Were you able to run the simulation successfully with the provided sources?
You mentioned differences in the compilation libraries. Which ones exactly?
Reading binary values as hex values requires different functions or configuration settings. Any idea where this can happen? The SYSGEN VHDL conversion library that reads in the stimuli uses text_io.read which takes binary vectors. For hexadecimal vectors text_io.hread would be needed.