**UPGRADE YOUR BROWSER**

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

- Community Forums
- Xcell Daily Blog
- Technical Blog
- About Our Community
- Announcements
- Welcome & Join
- General Technical Discussion
- Programmable Devices
- UltraScale Architecture™
- 7 Series FPGAs
- Virtex® Family FPGAs
- Spartan® Family FPGAs
- Xilinx Boards and Kits
- Configuration
- Design Tools
- Installation and Licensing
- Synthesis
- Simulation and Verification
- Implementation
- Design Entry
- Timing Analysis
- Vivado TCL Community
- HLS
- Design Methodologies and Advanced Tools
- SDAccel
- Design Tools - Others
- Embedded Systems
- Embedded Development Tools
- Embedded Processor System Design
- Embedded Linux
- Zynq All Programmable SoC
- SDSoC Development Environment
- OpenAMP
- Intellectual Property
- PCI Express
- Networking and Connectivity
- MIG
- DSP and Video
- System Logic

turn on suggestions

Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.

Showing results for

- Community Forums
- :
- Xilinx Products
- :
- Intellectual Property
- :
- DSP and Video
- :
- converting floating point values to fixed point

Topic Options

- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic to the Top
- Bookmark
- Subscribe
- Printer Friendly Page

- Mark as New
- Bookmark
- Subscribe
- Subscribe to RSS Feed
- Highlight
- Email to a Friend
- Report Inappropriate Content

02-09-2012 03:00 PM

hello there,

i am new to XILINX.

I am trying to implement Discrete Wavelete Transform using VHDL with ISE 9.2.

Here i need to use floating point values. i have gone through the link

**http://www.xilinx.com/support/answers/5366.htm**

** the artical is **

**Description**

Keywords: CORE Generator, CORE Generator, coef, COE, FIR, PSA, SDA, fixed point, floating point, normalize, filter

When a FIR filter is designed, the coefficient values are typically given in floating-point format. However, the Xilinx Distributed Arithmetic FIR (DA FIR), Multiply Accumulate FIR (MAC FIR) filter cores can accept only fixed-point coefficient values. Floating-point coefficient values must be normalized to fixed-point values before they can be used with Xilinx FIR filter cores. How are these values converted?

NOTE: The FIR Compiler Core can accept Floating-point coefficients, and will perform the following conversion automatically, based on the coefficient bit width.

**Solution**

The conversion process outlined below expects floating-point format coefficient values with a maximum value of less than "1". These are converted to signed integers in "2's" complement format. *For example*:**Coefficients are 0.0174, -0.0123, 0.127, -0.0123, 0.0174**

1. The first step in converting the coefficients is to determine the number of bits needed to represent the coefficients (N). Typically, this is a system-level decision and is a factor of the required Dynamic Range of the filter and the implementation costs associated with the filter. This value provides the maximum and minimum possible values for the coefficients by calculating the following equation:**Maximum value = 2^(N-1)-1****Minimum value = -2^(N-1)**

NOTE: The N-1 is used because the coefficients are "2's" complement.*For example*:**For 10 bits, the maximum value is 511 and the minimum value is -512.**

2. The second step is to normalize the floating-point values such that the maximum possible dynamic range can be achieved from the coefficient values. This is accomplished by determining the maximum absolute value of the coefficients and dividing it into the coefficients, as in the following equation:**(coefficients) / max_of_coefficients ( absolute_value_of_coefficients (coefficients) )***For example*:**Normalized values are 0.1370, -0.0969, 1, -0.0969, and 0.1370.**

This normalizes ALL the coefficients to either 1 or -1, depending upon the coefficients.

3. The final step is to take the normalized values and multiply them by the maximum possible value for the coefficients as calculated in Step 1. The result is then rounded to "quantize" the values to the coefficients.**result = round (normalized_values * 2^(N-1)-1)***For example*:**2's complement fixed-point values are 70, -49, 511, -49, and 70.**

You can combine these steps to form the following MATLAB equation, which converts the values assuming a bit width (N) and a floating-point coefficient array (coef).**result = round (coef/max(abs(coef)) * (2^(10-1)-1))**

Use the new coefficients in your COE file, ensuring that the RADIX declaration in the COE file is consistent with the number base used when you specify the coefficients.

My question is if i use such fixed point values for calculating DWT at the end wil i be able to convert fixed point values to floating point values. if yes how to do it.

Please help me it is urgent.

- Mark as New
- Bookmark
- Subscribe
- Subscribe to RSS Feed
- Highlight
- Email to a Friend
- Report Inappropriate Content

02-10-2012 08:04 AM

The Answer record you listed is really targeted towards coeffient data, and how to convert your values you might get from a filter design tool, like Matlab, into something that can be used by the FIR Compiler.

The answer record walks you through the conversion from a deimal number to a binary number and also the quatizatoin, to a fixed bit width.

If you simply want to know the decimal value that each binary number reprsents, you would just walk through the answer record in the reverse order. Start with the binay output, and convert it back into the equivalent decimal value.

The case that is being handled here really is showing how you understand the value being represented by a binary number.

Chris

Video Solutions Center: http://www.xilinx.com/support/answers/56851.htm

Video Solutions Center: http://www.xilinx.com/support/answers/56851.htm