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01-08-2019 06:22 PM
Hi, In here https://www.xilinx.com/products/design-tools/embedded-vision-zone.html#design , I see, the following demo's is support by Ultra96 boards, but how can I get these demo files to start my learning of revision stack, or is there any user guide for me? thanks.
01-08-2019 06:27 PM - edited 01-08-2019 06:28 PM
01-08-2019 06:27 PM - edited 01-08-2019 06:28 PM
01-10-2019 12:01 AM
01-23-2019 09:02 AM
@fengwuxxx@lixun123 Please note that CHaiDNN differs from what Xilinx refers to as the "re:Vision" platform. CHaiDNN is an open-source ML inference platform that leverages SDSoC. The re:Vision platform integrates the DEEPHi DPU IP and does provide support for the Ultra96. DNNDK / re:Vision lso leverages SDSoC, but does not have open-source IP and uses a different design flow:
https://www.xilinx.com/products/design-tools/ai-inference/ai-developer-hub.html#edge
Both are viable solutions with their own advantages. The DNNDK flow is the officially supported flow today, while CHaiDNN is primarly supported via the forums.
The table that you reference is specific to the DNNDK flow.
--Quenton
01-23-2019 09:06 AM
02-13-2019 01:09 AM
Hi Terry,
I had a look to https://github.com/Xilinx/Revision-Getting-Started-Guide, but the design VCU + CNN for zcu104 is till unavailabel. This is tated on the site:
Can you please tell me when will be available? Now is quite a long time since 18.3 is released ...
Best regards,
Stelian