03-26-2018 07:18 PM
Dear All,
I'm trying to implement the UART and came cross Coregen tool can make UART IP for Xilinx FPGA but I think it's for AXI system not non-AXI system.
When I see that document, I'm not sure and can't find whether I can use AXI UART IP Core of Xilinx to non AXI interface.
If we can use it for non-AXI interface, Would you please help me what am I supposed to do ?
03-26-2018 10:41 PM
@love119 The UART IP is exactly a wrapper to adapt the UART protocol to AXI. If you want to use the UART protocol directly, there are easier ways like this
https://www.nandland.com/vhdl/modules/module-uart-serial-port-rs232.html
03-26-2018 07:59 PM
@love119 what non-AXI protocol are you using?
03-26-2018 09:05 PM
03-26-2018 10:41 PM
@love119 The UART IP is exactly a wrapper to adapt the UART protocol to AXI. If you want to use the UART protocol directly, there are easier ways like this
https://www.nandland.com/vhdl/modules/module-uart-serial-port-rs232.html