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cfoucher
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Registered: ‎09-30-2015

Add ports to IP in IP packager

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Hello,

 

I'm trying to create a custom IP using Vivado. I generated an AXI4 IP using "Create and package IP". I've added parameters, memory map, created a customization interface, then edited the VHDL code. Everything went well, until I added a custom port in the VHDL "User ports" area. A simple out Std_logic_vector(7 dwonto 0).

 

This port never made it to the IP packager interface. I'm unable to find it in the "Ports and Interfaces" area, neither in the "Add port interface" window, not it displays on the block view. The funniest thing is, if I discard all configuration and start from scratch using "package an existing directory", and select "Overwrite" instead of "Open", the port correctly appears. But I don't want to do that, because I would loose every customization I made before.

 

Any hint on what to do to make it appear?

 

Thanks.

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swolf
Xilinx Employee
Xilinx Employee
29,804 Views
Registered: ‎07-09-2013

There are two things you can look at that might be causing this behavior.

 

First, check in the files panel of the packager display, open the "synthesis" folder and double check that the last file listed in this synthesis group is actually the same file being edited.  This last file is what the system is supposed to be monitoring for changes.  If for some reason it's not the last file in the list, or there is some path issue to the file, then the system won't do this automation.  (If you do see this is the wrong file, you can move the files around in this display).

 

Second, in the ports & interfaces panel, right click and choose to (re)import ports.  A dialog should be shown with the file and module name to use when scanning for the new ports (it should be that last file in the synthesis group from the step above).  Can you then continue forward if the file looks right, and the system will scan for the ports there, and you *should* see your new port.

View solution in original post

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cfoucher
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Registered: ‎09-30-2015
Btw, I'm using Vivado 2015.2 (sorry, didn't found the "edit" button).
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vemulad
Xilinx Employee
Xilinx Employee
18,284 Views
Registered: ‎09-20-2012

Hi @cfoucher

 

Once you modify the RTL files in the IP packager project, open the component.xml and click on "merge changes from ports and interfaces wizard" option seen on top banner. After this go to "review and package" and click on "repackage ip".

 

Untitled.png

 

Thanks,

Deepika.

Thanks,
Deepika.
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cfoucher
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18,255 Views
Registered: ‎09-30-2015

Hi, @vemulad,

Thanks for this tip, but unfortunately, this banner does not appear.

I thought maybe it was because I edited the VHDL file using an external editor, so I tried adding another port by editing the file inside Vivado, but the banner still doesn't appear.

 

 

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vemulad
Xilinx Employee
Xilinx Employee
18,251 Views
Registered: ‎09-20-2012

Hi @cfoucher

 

Close and reopen the component.xml file (under IP XACT folder in sources window)  after editing HDL files.

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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cfoucher
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Registered: ‎09-30-2015

@vemulad, just tried it, still no luck...

 

I think I'll end recreating a component from scratch, there seems to something broken in this component...

 

Thanks for your help.

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swolf
Xilinx Employee
Xilinx Employee
29,805 Views
Registered: ‎07-09-2013

There are two things you can look at that might be causing this behavior.

 

First, check in the files panel of the packager display, open the "synthesis" folder and double check that the last file listed in this synthesis group is actually the same file being edited.  This last file is what the system is supposed to be monitoring for changes.  If for some reason it's not the last file in the list, or there is some path issue to the file, then the system won't do this automation.  (If you do see this is the wrong file, you can move the files around in this display).

 

Second, in the ports & interfaces panel, right click and choose to (re)import ports.  A dialog should be shown with the file and module name to use when scanning for the new ports (it should be that last file in the synthesis group from the step above).  Can you then continue forward if the file looks right, and the system will scan for the ports there, and you *should* see your new port.

View solution in original post

cfoucher
Visitor
Visitor
18,231 Views
Registered: ‎09-30-2015

@swolf

Right-click, Import IP Ports: That did the thing, thanks for your help!

 

Thanks both of you for helping me,

 

Cheers.

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ronnywebers
Advisor
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15,444 Views
Registered: ‎10-10-2014

in the 'import IP ports', I also had to select the correct top level file, the packager was referring to some other module. Also each time I repackage, I need to refer again to the correct top level file, it doesn't seem to remember this.

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ejubenville
Participant
Participant
5,632 Views
Registered: ‎10-17-2008

It "remembers" which is the top level file by virtue of its location as the last file in the list of synthesis files.  This was the situation that caused me grief when the IP packager seemingly refused to add a new port. 

The solution for me was to open the list of Synthesis files in the File Groups tab and drag the top level file to the bottom of the list.  Unfortunately, that drag must be done in two steps.  First, drag the file to the next-to-last position.  Then drag the file below it to above it.  For some reason, trying to drop a file at the bottom of the list doesn't seem to be supported.  (I am using Vivado 2018.2)

Once I fixed the file order, I exited the IP packager and "touched" the top level file to modify its date/time.  When I subsequently reopened the IP packager, it detected the changed file and presented me with the prompt to "Merge changes from the ports wizard".  Like magic, the new port appeared.