Can't change pin properties in Blockdesign with Vivado 2020.1

[msauerpb]

Hi,

I installed Vivado 2020.1 on Windows 10.

If I open my project (created with Vivado 2017.4) and updated the IP cores I will get this error messages:

[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_lwl_dio_0/Clk400(100000000) and /Core0/mig_7series_0/ui_addn_clk_0(400000000)
[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_controller_0/Clk200(100000000) and /Core0/mig_7series_0/ui_addn_clk_1(200000000)
[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_lwl_dio_0/Clk200(100000000) and /Core0/mig_7series_0/ui_addn_clk_1(200000000)
[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_lwl_dio_0/Clk400(100000000) and /Core0/mig_7series_0/ui_addn_clk_0(400000000)
[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_controller_0/Clk200(100000000) and /Core0/mig_7series_0/ui_addn_clk_1(200000000)
[BD 41-238] Port/Pin property FREQ_HZ does not match between /Core0/axi_lwl_dio_0/Clk200(100000000) and /Core0/mig_7series_0/ui_addn_clk_1(200000000)

Vivado removes the pin properties in my block design from module axi_lwl_dio_0 and axi_controller_0. How can I set the properties of the clock pins? In Vivado 2017.4 there will be the correct values?

Thank you for your help.

BR

martin 

[msauerpb]

No one who has a solution for this problem?

BR

martin

[wbyjerry]

I've faced this.

The block pin properties shows that FREQ_HZ is read-only.

I think the value is calculated automatically by software.

[wbyjerry]

I've solve this problem.

You could modify the IP by adding FREQ_HZ parameters to the clock interface in IP editor.

Then get back to your project and update the IP.