05-07-2019 05:18 PM
I've been going insane trying to find a solution to this problem! Basically, I am defining a custom IP block for my system (Nexys4DDR) which I want to be able to connect with one of the PMOD ports listed in the "board componenets" section. I have the board file as well as the IP repository. This repository defines a custom interface type, "PMOD". When I create the IP, I set the interface type to be "PMOD" and I even went a bit further: copying the template of some of the Xilinx-provided IPs, I set some special interface parameters: BUSIF.BOARD_INTERFACE=Custom, and BOARD.ASSOCIATED_PARAM=PMOD.
Doing all this, I am able to connect the JC port to my custom HB3pmod block. I double-clicked on JC, scrolled to the bottom, and my IP block showed up as something that could be created and connected to it, just like all the other PMOD-linkable IPs. However, unlike all the other provided IPs, if the block is already in the design and I drag-and-drop the JC port in, it won't automatically connect. So it can create-and-attach, but it won't attach-to-existing for some strange reason. Furthermore, once it is connected, the symbol next to "JC" in the component list doesn't change like it does when I connect one of the PMODs to a provided IP. If I build an HDL wrapper from this, it correctly builds all of the IObuffers and hooks things up right, but it doesn't automatically handle the constraints (IOSTANDARD and PACKAGE_PIN) like the other PMODs connected to the other IPs; in order for the design to work, I have to manually set those constraints.
In short, I can almost get the system fully automated, and it's driving me crazy how close I am. What am I missing? What is different between the IP I defined and the ones provided by Xilinx? Something about IP creation, interfaces, board files, board components, and all that nonsense is slipping past me.
A related problem, but one that I doubt is solvable: How do I define an interface for an IP block that is intended to link with the buttons/switches/LEDs, one of these mono-directional connections that don't need a tristate buffer? The closest thing I can see in the existing interface definitions is the tristate GPIO connection, and I can't see an input-only or an output-only interface anywhere. Again, the goal is to make this play as nicely with the board file/board components as the provided IP blocks.
08-05-2019 08:02 AM
I'm in the same situation, did you find a solution to your issue?