04-03-2018 06:20 AM
I have a design that was developped for Spartan 6 using ISE 14.4. It is a quite complicated design and fills pretty much the whole FPGA (98% of slices occupied). I know that a few options had to be checked to make the generated design work.
I now want to to automatize the processus of building bitfiles. For that, I am trying to build a first one using TCL. I generated a TCL script from the working project that I edited to meet my needs. The build works, however it seems that some of the bitfiles generated this way doesn't always work on my device. Also for identical configurations, it looks like the bitfiles are not exactly the same (at least they differ in size).
I believe that there is a difference in options passed to the building process, however I can't find where it is. Here is a list of a few information that may help:
- I run the TCL script by sourcing it directly in xtclsh.exe located in bin/nt64 (the unwrapped version fails to run because of a missing DLL)
- When applying process properties, the script throws some INFO lines stating that some properties are "currently disabled due to the value of another property. The value has been set but will not be used."
- The process properties of the project generated via TCL are identical to my original project
Thank you for your time
04-04-2018 09:26 AM
I would suggest taking the log files from each of the compilation flows, and using a comparison tool to examine the differences closely. you can add the -verbose flag to ngdbuild as well to get more info.
04-06-2018 09:02 AM
Just a little update in case anyone bumps here.
Indeed looking closely to the log files confirmed that the process properties were not as identical as I first thought. Thanks for the tip.
The fix I found was to apply the process properties just before building a bitfile, instead of setting them right after the project creation.
Hope this will help