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Example design for 7 Series PCIe endpoint and DMA

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Explorer
Posts: 126
Registered: ‎01-12-2009
Accepted Solution

Example design for 7 Series PCIe endpoint and DMA

Is there an example somewhere in Vivado 2017.3 showing a complete design using the DMA/Bridge Subsystem for PCI Express (PCIe) IP?

 

If not, then is there a compete example that shows use of the DMA/Bridge Subsystem for PCI Express (PCIe) IP? I have read that there is a PIO example somewhere that uses this IP, but I have not been able to find it.

 

I am trying to understand using these IP blocks, and I would like to get started by building a complete known-good design so that I can see how the pieces fit together. I do not need, or particularly want, to be able to run the design. I just want to implement it into a chip so that I can see how things fit together.


Ian Lewis

www.mstarlabs.com


Accepted Solutions
Adventurer
Posts: 83
Registered: ‎12-05-2016

Re: Example design for 7 Series PCIe endpoint and DMA

hi @ilewis,

 

you can find the PIO interface in the example design. you will get the VHDL files in example design if your target language is VHDL. 

please check the attached images.

 

regards,

reshma 

View solution in original post

vhdl.png
PIO.png

All Replies
Explorer
Posts: 126
Registered: ‎01-12-2009

Re: Example design for 7 Series PCIe endpoint and DMA

I found that there is a right click option on the IP, once you instantiate it in a project, that is called "Open IP Example Design".

 

That sounds at least somewhat promising, but it creates a Verilog example.

 

I would like to find a VHDL example if there is one.

 

Ian Lewis

www.mstarlabs.com

Adventurer
Posts: 83
Registered: ‎12-05-2016

Re: Example design for 7 Series PCIe endpoint and DMA

hi @ilewis,

 

please check these,

 

https://www.xilinx.com/support/documentation/application_notes/xapp1171-pcie-central-dma-subsystem.pdf

 

https://www.xilinx.com/support/documentation/application_notes/xapp1286-pcie-axi4-lite-bridge.pdf

 

 

regards,

reshma

 

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Adventurer
Posts: 83
Registered: ‎12-05-2016

Re: Example design for 7 Series PCIe endpoint and DMA

hi @ilewis,

 

you can find the PIO interface in the example design. you will get the VHDL files in example design if your target language is VHDL. 

please check the attached images.

 

regards,

reshma 

vhdl.png
PIO.png
Explorer
Posts: 126
Registered: ‎01-12-2009

Re: Example design for 7 Series PCIe endpoint and DMA

Thank you for your help, Reshma.