01-16-2019 07:25 AM
I am currently working on a project that involves a Zynq UltraScale+ part, XCZU2CG-2SFVC784I, and it has become apparent to me that the using the block diagram editor to integrate the PS and PL with external IO has the large potential of being painful. Organization of these external IO's is already difficult and I don't even have a third of what needs to be implemented.
I was curious to see what others have done for projects involving a large number of IO/External Ports in their block designs, or if others have simply abandoned the Block Diagrams. If the latter is true, how difficult was it integrating PS and PL communication across the UltraScale+ platform?
01-17-2019 01:45 PM
What part of the flow is painful for connecting your external pins?
If something is repetitive, you can use TCL to automate parts of it.
01-17-2019 03:23 PM
That's something I have not thought of before, is there a reference for writing a TCL script that tailored toward Vivado's Block Diagram tools?
The painful part involving all of these external pins in the block diagram would be the organization, having a tool like the block diagram seems ideal to provide an good visual for the designer. Additionally, the block diagram would be something nice to show as a status/presentation but with all of these external pins and with the way they become cluttered quickly it doesn't seem like it would help for presenting some sort of progress.