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Registered: ‎03-19-2010

FIR compiler - efficiency issue ?

Hello there,
I was not sure about posting my question here or to DSP board, but it is rather related to FIR Core itself than algorithms stuff. I'm pushing FIR compiler to its limits a bit as I need 1024 tap 4 times interpolating filter, 32 bit resolution coefs as well as input signal. I think no further details are needed.
Here's my concern.

Obsolete MAC FIR filter 5.1 core generates filter occupying about 15% of logic, 4 BRAMs and 4 MULTs in Spartan 3S200/3S250E. Generating core itself took about 30 seconds. 
Now FIR Compiler 4.0 does the IDENTICAL job with 48% of logic, 5 BRAMs, 4 MULTs and requiring incredible 17 minutes to generate the core.
I though that new versions of anything should be faster, better and more efficient while I experience quite opposite with FIR Compiler. I'm using ISE 10.1.3.
Anyone has similar experience with other cores or can comment on this ? 




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