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9,186 Views
Registered: ‎10-25-2009

Generate Synthesized Design checkpoint

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After Vivado, when customize a IP core, it will warn that if "Generate Synthesized Design checkpoint".

what is it used for? Which document give specific explanation about .dcp file?

 

Thanks!

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Xilinx Employee
Xilinx Employee
14,159 Views
Registered: ‎09-20-2012

Re: Generate Synthesized Design checkpoint

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Hi,

 

This option is by default enabled in vivado 2013.3 for some of the IP cores. This option runs synthesis on the IP assuming it as OOC module (no io buffers inserted) and generates a DCP for it. This Design Checkpoint (DCP) file contains constraints and post synthesis netlist for IP.

 

When top level synthesis is run, it picks up the synthesized DCP of the IP and runs synthesis only on other logic (synthesis is not run on IP again).

 

For more details refer to page-33 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_3/ug892-vivado-design-flows-overview.pdf

 

Thanks,

Deepika. 

Thanks,
Deepika.
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Xilinx Employee
Xilinx Employee
14,160 Views
Registered: ‎09-20-2012

Re: Generate Synthesized Design checkpoint

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Hi,

 

This option is by default enabled in vivado 2013.3 for some of the IP cores. This option runs synthesis on the IP assuming it as OOC module (no io buffers inserted) and generates a DCP for it. This Design Checkpoint (DCP) file contains constraints and post synthesis netlist for IP.

 

When top level synthesis is run, it picks up the synthesized DCP of the IP and runs synthesis only on other logic (synthesis is not run on IP again).

 

For more details refer to page-33 of http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_3/ug892-vivado-design-flows-overview.pdf

 

Thanks,

Deepika. 

Thanks,
Deepika.
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Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)

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Xilinx Employee
Xilinx Employee
9,181 Views
Registered: ‎10-24-2013

Re: Generate Synthesized Design checkpoint

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You can use the synthesis DCP files in Vivado Design Suite
designs to speed synthesis of reused IP cores, and in third party synthesis tools to provide netlists for black box IP.
Refer to http://japan.xilinx.com/support/documentation/sw_manuals_j/xilinx2013_3/ug939-vivado-designing-with-ip-tutorial.pdf
Thanks,VIjay
Thanks,Vijay
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9,163 Views
Registered: ‎10-25-2009

Re: Generate Synthesized Design checkpoint

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Hi vemulad,
thank you for your reply.
I also want to know what is OOC (out -of -context)?
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Moderator
Moderator
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Registered: ‎06-05-2013

Re: Generate Synthesized Design checkpoint

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Check the following user guide
http://www.xilinx.com/support/documentation/sw_manuals/xilinx2013_3/ug905-vivado-hierarchical-design.pdf

 

Check the following link also. http://forums.xilinx.com/xlnx/board/crawl_message?board.id=Hier_Des&message.id=905


Thanks

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