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Explorer
Explorer
521 Views
Registered: ‎02-08-2017

Generate TriMAC without phy-interface

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I am trying to use Xilinx TriMAC IP core for kintex7 device. At the same time I am generating also Xilinx pcs-pma in the same project so that I can use GTE teils in kintex7.

So The generated MAC should be connected to the generated pcs-pma (.i.e. it is not connected to IO pins of the FPGA).

I generated the MAC without shared logic.

withoutsharedlogic.PNG

 

Still the MAC is generated with physical interface.

genwithphyinterface.PNG

 

 

Consequently, implementation fails as this phy-interface has IDelay and IBuf instances which is designed to be in IO banks only.

Could you please advise how to overcome this.

 

Moreover, I just generate the IP in GUI mode. but I have to run it in batch mode. So I generated it and use my script to include the generated files using command 

 

read_ip ../path/to/trimac_9_6/tri_mode_ethernet_mac_0.xci

But it seems that Vivado is ignoring my files(which is in vhdl) and regenerates the whole IP again in the project space (it is generated in verilog). So I am not able to modify the source file as it is always ignored when read_ip command is called.

 

Thanks in Advance

 

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Xilinx Employee
Xilinx Employee
709 Views
Registered: ‎02-06-2013

Re: Generate TriMAC without phy-interface

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Hi

 

You need to select PHY interface as internal during TEMAC generation when  you want to interconnect with PCS PMA core by generating the core manually.

 

You can also use AXI Ethernet subsysystem core which will integrate the the PCS PMA core without user intervention when you select the phy type as 1000Base_x or SGMII.

 

https://www.xilinx.com/products/intellectual-property/axi_ethernet.html

Regards,

Satish

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Xilinx Employee
Xilinx Employee
710 Views
Registered: ‎02-06-2013

Re: Generate TriMAC without phy-interface

Jump to solution

Hi

 

You need to select PHY interface as internal during TEMAC generation when  you want to interconnect with PCS PMA core by generating the core manually.

 

You can also use AXI Ethernet subsysystem core which will integrate the the PCS PMA core without user intervention when you select the phy type as 1000Base_x or SGMII.

 

https://www.xilinx.com/products/intellectual-property/axi_ethernet.html

Regards,

Satish

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Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful.
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