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Visitor zoumin
Visitor
6,832 Views
Registered: ‎07-13-2009

【Help!】wr_data_count in FIFO

        These days I encountered a problem, could someone tell me what on earth does the wr_data_count means?

        In the datasheet of the FIFO Generator, it says’ WR_DATA_COUNT reports the number of words written into the FIFO.’ It seems to mean the number of words that have been written into the FIFO, in this case, the value of the WR_DATA_COUNT will increase all the time, and never decrease.

        However, in the programmable full applications, I saw that the value of the WR_DATA_COUNT decreases. How could this happen if it means the number of words written into the FIFO? It seems more likely to mean the number of words the FIFO contains currently, and in this way we can explain why the value decreases, because the read operation occurs.

Programmble full.jpg

 

       Now in my own project, I try to implement the prog_full function. I set up a 12 bit-width and 1024-depth FIFO. What I want to implement is when the wr_data_count reaches 200(oxC8), the prog_full is asserted, and when it decreases to 180(oxB4), the prog_full is deasserted. The write operation continues until the value of wr_data_count reaches 200, and then the read operation starts, which will cause the value of wr_data_count decrease. What I saw was that the value of wr_data_count didn’t decrease, and the prog_full signal never turned to low.

Programmble full_my.jpg

 

        So, what does wr_data_count really mean? Thank you very much!^_^

 

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5 Replies
Instructor
Instructor
6,827 Views
Registered: ‎07-21-2009

Re: 【Help!】wr_data_count in FIFO

In the datasheet of the FIFO Generator, it says’ WR_DATA_COUNT reports the number of words written into the FIFO.’

 

It means the number of words written to the FIFO, less the number of words read from the FIFO.


However, in the programmable full applications, I saw that the value of the WR_DATA_COUNT decreases. How could this happen if it means the number of words written into the FIFO?

 

Figure 5-13 is intended to demonstrate the Programmable Full logic.  It doesn't show the FIFO read signals.  Instead, it uses the WR_DATA_COUNT to show that read activity is taking place.

 

It seems more likely to mean the number of words the FIFO contains currently, and in this way we can explain why the value decreases, because the read operation occurs.

 

Correct.

 

Now in my own project, I try to implement the prog_full function. I set up a 12 bit-width and 1024-depth FIFO. What I want to implement is when the wr_data_count reaches 200(oxC8), the prog_full is asserted, and when it decreases to 180(oxB4), the prog_full is deasserted. The write operation continues until the value of wr_data_count reaches 200, and then the read operation starts, which will cause the value of wr_data_count decrease. What I saw was that the value of wr_data_count didn’t decrease, and the prog_full signal never turned to low.

 

I don't understand how any signals change without any read clock or write clock pulses.  Please explain how you are clocking this FIFO.

 

-- Bob Elkind

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Advisor joelby
Advisor
6,822 Views
Registered: ‎10-05-2010

Re: 【Help!】wr_data_count in FIFO


 I don't understand how any signals change without any read clock or write clock pulses.  Please explain how you are clocking this FIFO.


I'll make a guess that rd_clk and wr_clk are synchronous with the ChipScope Pro clock, and thus they don't appear to change through time. However there's no way to tell if the clocks are being gated, which might be one explanation for why wr_data_count stops changing.

 

Yeah, please post your FIFO control code.

 

 

Visitor zoumin
Visitor
6,696 Views
Registered: ‎07-13-2009

Re: 【Help!】wr_data_count in FIFO

For question "Please explain how you are clocking this FIFO"
My answer: As joelby says following,"rd_clk and wr_clk are synchronous with the ChipScope Pro clock, and thus they don't appear to change through time" .
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Visitor zoumin
Visitor
6,685 Views
Registered: ‎07-13-2009

Re: 【Help!】wr_data_count in FIFO

I really appreciate for your help!^_^

I am still doing experiments to understand how the wr_data_count works. Later I will give you my answers.^_^

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Instructor
Instructor
6,677 Views
Registered: ‎07-21-2009

Re: 【Help!】wr_data_count in FIFO

Thank you for that, joelby.  My lack of experience with chipscope is showing.

 

To zoumin,

 

Are you using the same clock for both wr_clk and rd_clk -- which appears to be the case based on your chipscope trace?  If so, why are you using an independent clock configuration rather than a common  clock configuration?

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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