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Explorer
Explorer
4,690 Views
Registered: ‎07-25-2016

Hold time violation in vivado

Hi there,

 

  I have hold time violation in my design, the timing summary shown below.

How do i set it right.? what are the general steps? (any helpful link or material..?)

 

Thanks a lot in advance.

 

Shashi

timing.PNG
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5 Replies
Moderator
Moderator
4,673 Views
Registered: ‎07-01-2015

Re: Hold time violation in vivado

Hi @sai_shashi,

 

Try with explore with hold fix directive.

Thanks,
Arpan
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Historian
Historian
4,660 Views
Registered: ‎01-23-2009

Re: Hold time violation in vivado

You really haven't given us much information to work with. The timing violations appear to be on the same clock domain (since they are Intra-Clock paths), so that rules out the most common cause (missing constraints having to do with clock crossing).

 

The magnitude of the failures is very small, but the number is very large. This is unusual... Are you sure you are not looking at a post-synthesis or post-placement  (as opposed to a post-implementation) timing report? Hold time fixing is mostly done by the router...

 

You need to show us the failing path and your timing constraints in order for us to be able to give you any more information. For example, are they "normal" flip-flop to flip-flop paths or are they associated with inputs or outputs?

 

Avrum

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Moderator
Moderator
4,612 Views
Registered: ‎07-01-2015

Re: Hold time violation in vivado

Hi @sai_shashi,

 

Can you please try with Performance Explore directive?

Thanks,
Arpan
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1.JPG
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Observer xmartin
Observer
3,312 Views
Registered: ‎01-27-2017

Re: Hold time violation in vivado

Hi guys,

 

A short feedback from @arpansur solution, even though I did not create this thread.

My design have met some hold timing violation (obviously, according to the STA my design is too fast).

 

I have tried to switch implementation strategy from "Vivado implementation default" to "Performance Explore", but it got worst. More timing violations (Setup violation and more Hold violation).

 

After reading the ug904, I switch back to "Vivado implementation default" and enable "phys_opt_design" in implementation setting and add "-hold_fix" in more options. All the hold violation timing has been vanished after a new implementation.

Visitor justinbloom
Visitor
202 Views
Registered: ‎06-02-2019

Re: Hold time violation in vivado

This seems to have fixed my problem! Thanks!

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