UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

cancel
Showing results for 
Search instead for 
Did you mean: 
Participant bcarltontrex
Participant
5,029 Views
Registered: ‎01-30-2017

How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution

I get this message

 

[Timing 38-316] Clock period '10.000' specified during out-of-context synthesis of instance vio at clock pin 'clk' is different from the actual clock period  this can lead to different synthesis results.

 

Where do I specify this clock period? I tried editing the ooc xdc file, but that was overwritten when I regenerated the IP.

Tags (1)
0 Kudos
1 Solution

Accepted Solutions
Xilinx Employee
Xilinx Employee
9,144 Views
Registered: ‎09-20-2012

Re: How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution

Hi @bcarltontrex

 

Try the method described in page-30,31 of https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_4/ug896-vivado-ip.pdf

 

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
4 Replies
Xilinx Employee
Xilinx Employee
9,145 Views
Registered: ‎09-20-2012

Re: How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution

Hi @bcarltontrex

 

Try the method described in page-30,31 of https://www.xilinx.com/support/documentation/sw_manuals/xilinx2016_4/ug896-vivado-ip.pdf

 

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
Highlighted
Participant bcarltontrex
Participant
4,961 Views
Registered: ‎01-30-2017

Re: How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution

That helped. The specific property wasn't one of those listed in the document, it was CONFIG.SIGNAL_CLOCK.FREQ_HZ. Sample command:

 

  set_property CONFIG.SIGNAL_CLOCK.FREQ_HZ 161000000 [get_ips vio_wide_input]

Tags (1)
0 Kudos
Visitor serg_k
Visitor
3,816 Views
Registered: ‎12-09-2015

Re: How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution

Hello,
  I created fifo_generator_0 in vivado. I need to work under 125MHz. I started 125 MHz there. At synthesis I receive the warning.

[Timing 38-316] Clock period '10.000' specified during out-of-context synthesis of instance 'fifo_generator_0' at clock pin 'rd_clk' is different from the actual clock period '8.000', this can lead to different synthesis results.

I set the Tcl command

1. set_property CONFIG.CORE_CLK.FREQ_HZ 125000000 [get_ips fifo_generator_0]
2. set_property CONFIG.READ_CLK.FREQ_HZ 125000000 [get_ips fifo_generator_0]
3. set_property CONFIG.WRITE_CLK.FREQ_HZ 125000000 [get_ips fifo_generator_0]

1-st works, 2-nd and 3-rd do not work and they do not give errors.

File  fifo_generator_0.xci  after executing commands

<spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.CORE_CLK.FREQ_HZ">125000000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.MASTER_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.READ_CLK.FREQ_HZ">100000000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.SLAVE_ACLK.FREQ_HZ">100000000</spirit:configurableElementValue>
        <spirit:configurableElementValue spirit:referenceId="BUSIFPARAM_VALUE.WRITE_CLK.FREQ_HZ">100000000</spirit:configurableElementValue>
      

What am I doing wrong? how do I get the parameters changed?

With regards, Sergey.

0 Kudos
Visitor serg_k
Visitor
3,811 Views
Registered: ‎12-09-2015

Re: How specify clock frequency for VIO IP (Vivado 2016.4)

Jump to solution
get_property CONFIG.READ_CLK.FREQ_HZ [get_ips fifo_generator_0]
100000000
get_property CONFIG.READ_CLK.FREQ_HZ.value_src [get_ips fifo_generator_0]
user
set_property CONFIG.READ_CLK.FREQ_HZ 125000000 [get_ips fifo_generator_0]
125000000
get_property CONFIG.READ_CLK.FREQ_HZ [get_ips fifo_generator_0]
100000000
0 Kudos