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Adventurer
Adventurer
12,040 Views
Registered: ‎10-28-2011

How to add inverter, buffer, and other logic block by IPI?

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Hi:

 

I'm using IPI tool in Vivado to create a system.

For some reason I need to add a buffer and a inverter in the block diagram.

But I can't find such IP in the IP catalog.

How can I add such logic into block diagram?

 

The other question is, I tried to connect the on board reset pin to both the reset pin in clocking wizard IP and MIG7 IP.

But there'll be error message :

============================================================================

ERROR: [Synth 8-3257] port <RSTN> has illegal connections. This port is connected to an input buffer and other components.
Input Buffer:
Port I of instance \u_system_mig_7series_0_0_mig/u_iodelay_ctrl/u_sys_rst_ibuf (IBUF) in module <system_mig_7series_0_0>
Other Components:
Port I1 of instance i_20 (LUT2) in module system_rst_Clk_100M_0

============================================================================

How should I solve such problem?

 

Thanks!!

 

David

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1 Solution

Accepted Solutions
Xilinx Employee
Xilinx Employee
20,884 Views
Registered: ‎09-20-2012

Re: How to add inverter, buffer, and other logic block by IPI?

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Hi,

 

Regarding the error message, it looks like the reset port is driving an IBUF and LUT as shown below.

 

Port  --> IBUF (with in MIG) --> MIG logic

         --> LUT input pin

 

It should instead be 

 

Port --> IBUF --> MIG logic

                      --> LUT input pin

 

Thanks,

Deepika.

Thanks,
Deepika.
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9 Replies
Xilinx Employee
Xilinx Employee
12,038 Views
Registered: ‎09-20-2012

Re: How to add inverter, buffer, and other logic block by IPI?

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Hi,

 

You can use Utility differential IO buffer and utility vector logic IP's to add buffer and inverter respectively in block design .

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Xilinx Employee
Xilinx Employee
20,885 Views
Registered: ‎09-20-2012

Re: How to add inverter, buffer, and other logic block by IPI?

Jump to solution

Hi,

 

Regarding the error message, it looks like the reset port is driving an IBUF and LUT as shown below.

 

Port  --> IBUF (with in MIG) --> MIG logic

         --> LUT input pin

 

It should instead be 

 

Port --> IBUF --> MIG logic

                      --> LUT input pin

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Xilinx Employee
Xilinx Employee
12,010 Views
Registered: ‎09-20-2012

Re: How to add inverter, buffer, and other logic block by IPI?

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Hi @ccmake23

 

Did that help?

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
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Adventurer
Adventurer
12,005 Views
Registered: ‎10-28-2011

Re: How to add inverter, buffer, and other logic block by IPI?

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Hi Deepika:

 

Thanks for your info, it works.

BTW, for the reset port error, is the rule that I shouldn't connect a port to a BUF and other circuit at the same time?

Any reason why?

 

Thanks.

 

David

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Xilinx Employee
Xilinx Employee
11,995 Views
Registered: ‎09-20-2012

Re: How to add inverter, buffer, and other logic block by IPI?

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Hi,

 

Yes, the IBUF should be driving the logic. You cannot have port directly driving the IBUF and logic (with out IBUF in the path).

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
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Adventurer
Adventurer
11,991 Views
Registered: ‎10-28-2011

Re: How to add inverter, buffer, and other logic block by IPI?

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Got it! 

Thanks a lot! :)

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Adventurer
Adventurer
10,576 Views
Registered: ‎02-09-2011

Re: How to add inverter, buffer, and other logic block by IPI?

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Hello.

 

This may be obvious, but I can't see it.

 

Can I use an input vector width of 1 with the XOR function to make an inverter?  If not, how do I split up the input vector to drive the bits separately?

 

Thank you.

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Teacher muzaffer
Teacher
10,567 Views
Registered: ‎03-31-2012

Re: How to add inverter, buffer, and other logic block by IPI?

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xor of identical inputs doesn't make an inverter 1^1 is zero but 0^0 is also zero. nand on the other hand works: nand(1,1) is zero and nand(0,0) is one.
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Adventurer
Adventurer
10,552 Views
Registered: ‎02-09-2011

Re: How to add inverter, buffer, and other logic block by IPI?

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Thanks for posting.  I found my error.  I was using Utility Reduced Logic when I should have been using Utility Vector Logic, which has an inverter.  

 

 

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