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Visitor parimal55
Visitor
524 Views
Registered: ‎07-18-2018

How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

We are trying to compile ABEL code roject in Xilinx ISE 10.1 service pack 3. However, we are not able to see Synthesis tool as ABEL in ISE 10.1.We have ABEL and UCF file and we are using CPLD device. 

Can you help us to compile the ABEL code?

 

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8 Replies
Moderator
Moderator
500 Views
Registered: ‎03-16-2017

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi @parimal55,

Are you able to add ABEL file in your project? (As shown below, click on "open" icon and select options for ABEL and UCF)

able1.JPG

 

 

abel2.JPG

 

Regards,
hemangd

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Visitor parimal55
Visitor
498 Views
Registered: ‎07-18-2018

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi I am able to add ABEL and UCF file. Not able to synthesis in the tool ISE 10.1

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Moderator
Moderator
481 Views
Registered: ‎03-16-2017

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi @parimal55,

What error are you facing? provide snapshot. 

 

Also provide ABEL file to check it at my end. 

Regards,
hemangd

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Visitor parimal55
Visitor
465 Views
Registered: ‎07-18-2018

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Pease refer picture herewith. Cant provide ABEL code. Just want to know procedure for compilation for ISE 10.1

IMG_20190201_140834341_HDR.jpg
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Moderator
Moderator
443 Views
Registered: ‎03-16-2017

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi @parimal55,

 

ISE tool does not directly synthesize abel file. First it must be converted into VHDL or Verilog file which can be done using the command called ‘XPort’.

Have a look into this AR.https://www.xilinx.com/support/answers/17000.html

 

Regards,
hemangd

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Moderator
Moderator
383 Views
Registered: ‎03-16-2017

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi @parimal55,

Let us know if you have further queries on it, or close this thread by marking it as accepted solution.

Regards,
hemangd

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Visitor parimal55
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363 Views
Registered: ‎07-18-2018

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

We are getting errors in converting ABEL to VHDL. Please find attached pitcures for details.

error_ABEL.jpg
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Xilinx Employee
Xilinx Employee
358 Views
Registered: ‎05-22-2018

Re: How to compile ABEL code project in Xilinx ISE 10.1 with service pack 3

Hi @parimal55,

From the error description, it seems to be a syntax error in your .abl file, hav eyou tried to correct them?

Thanks,

Raj

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