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Participant kp1998_
Participant
348 Views
Registered: ‎06-11-2019

How to obtain verilog code from IP core

Hello

How can I generate verilog HDL code from an IP core component.

For example I am working with fir filter so I create a design by selecting FIR_COMPILER component from IP catalog, provide the required coefficient values and generate main module and test bench from it. But the main module and test bench code generated is in VHDL not in verilog. I am trying to change it into verilog but not able to do.

Please help with this.

Waiting for thr reply at the earliest.

Thank you

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10 Replies
Xilinx Employee
Xilinx Employee
336 Views
Registered: ‎05-22-2018

Re: How to obtain verilog code from IP core

Hi @kp1998_ ,

I guess you cannot achive that. If you check the FIR COMPILER IP user guide the design files are firstly encrypted and are in VHDL only:

firrrrrrrCapture.JPG

Thanks,

Raj

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Participant kp1998_
Participant
330 Views
Registered: ‎06-11-2019

Re: How to obtain verilog code from IP core

ok
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Xilinx Employee
Xilinx Employee
322 Views
Registered: ‎05-22-2018

Re: How to obtain verilog code from IP core

Hi @kp1998_ ,

Do you have further queries on this? If not, please close this thread by marking it as accepted solution. 

Thanks,

Raj

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Participant kp1998_
Participant
314 Views
Registered: ‎06-11-2019

Re: How to obtain verilog code from IP core

So for all the components present in IP catalog verilog code cannot be generated or is it only for FIR_COMPILER component.

Thank you

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311 Views
Registered: ‎01-22-2015

Re: How to obtain verilog code from IP core

@kp1998_ 

It is possible to mix VHDL and Verilog as shown in chapter 9 of UG901.  Have you already tried this mixing?

Mark

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Xilinx Employee
Xilinx Employee
310 Views
Registered: ‎05-22-2018

Re: How to obtain verilog code from IP core

Hi @kp1998_ ,

Thie information i shared was specific for FIR COMPILER. If in your BD there are other different blocks and in then if there are Xilinx IP blocks, you can check the Table as mentioned for FIR, in User guide of that IP whether Verilog is mentioned or VHDL is mentioned or both are mentioned.

Thanks,

Raj.

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Participant kp1998_
Participant
304 Views
Registered: ‎06-11-2019

Re: How to obtain verilog code from IP core

Ok Can u please share that user guide, will be of great help
Thank you
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Participant kp1998_
Participant
289 Views
Registered: ‎06-11-2019

Re: How to obtain verilog code from IP core

No i havent tried mixing cause i dont know VHDL language and i want to use only verilog because the other codes i have written using verilog only as i need to combine this particular code with the other ones.
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Xilinx Employee
Xilinx Employee
267 Views
Registered: ‎05-14-2008

Re: How to obtain verilog code from IP core


@kp1998_ wrote:
Ok Can u please share that user guide, will be of great help
Thank you

You can search for the IP "Product Guide" on xilixn.com by searching the IP name.

-vivian

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Xilinx Employee
Xilinx Employee
255 Views
Registered: ‎05-14-2008

Re: How to obtain verilog code from IP core

Which language being used for the IP really doesn't matter, unless that your simulator does not support mixed language simulation.

The IP is provided as a package. It comes with the instantiation template, GUI customization wizard, Product Guide for the interface and function details. You don't need to read the IP code.

I'm afraid most of the IPs come with VHDL.

What is your concern of using VHDL for the IP?

-vivian

-------------------------------------------------------------------------------------------------
Don’t forget to reply, kudo, and accept as solution.
-------------------------------------------------------------------------------------------------
如果提供的信息能解决您的问题,请标记为“接受为解决方案”。
如果您认为帖子有帮助,请点击“奖励”。谢谢!
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