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Visitor
Visitor
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Registered: ‎01-25-2018

I/O pin after programm fpga 7

hi every body
im using hpc2 of vc707 xilinx evaluation board
after configiuration some I/O pins that defined as input(in direction) are '1' and some are '0'.
can you explaine why its did?
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Visitor
Visitor
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Registered: ‎03-06-2018

Sounds like some pins may be set to have a pullup or pulldown. Depending on the pin, this could have been done to meet certain expectations of the board (like pulling an I2C clock line high or providing an external peripheral a default state).

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Visitor
Visitor
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Registered: ‎01-25-2018

Thanks for your replay
its different between boards(fpga device)?
I have 3 vc707 boards, by same bitfile for test AK42, this pin default is '1' and for another board defult is '0'.
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