08-07-2013 03:00 AM
I've been trying to package up some vhdl as an IP package using Vivado's IP packaging features. The code is entirely written in vhdl, and should be relatively simple to package, however when I create the IP package I've encountered a number of problems:
I also get a question mark next to several of my AXI stream interfaces when instantiating in IP Integrater. I have no idea what that means and nothing happens if I click on this question mark.
Any help would be appreciated.
08-07-2013 03:19 AM
Further examination shows that the verilog include issue is due to me misunderstanding what the "include file" checkbox was for.
The greayed-out configuration seems to happen if I try to use a list of key-value pairs for configuring the parameter, but not if I let it be a free entry integer value.
08-07-2013 10:56 AM
I just gave a try to recreate your problem. I have used "Value Validation list" for giving specific set of values to parameter and packaged the IP.
I didnot see any issue when customizing the created IP.
What is the "Value format" of the parameter?
Also while packaging the IP are there any warnings?
One small point to note, the values in the "Value validation list" should be given as below ("",):