03-18-2015 02:56 AM - edited 03-18-2015 02:58 AM
I have an IP project under revision control.
when the component.xml file is generated there is a xilinx tag of
<xilinx:tag xilinx:name="Vendor:Library:Name:Version_ARCHIVE_LOCATION">C:/FPGA/[absolute path to project]</xilinx:tag>
Is there a reason why this cannot have a relative path? This prevents this project being portable between machines.
The tag is generated when ipx::save_core is run i think.
Edit: Vivado 2014.4 both Windows 7 and SLED11
03-18-2015 03:24 AM
Do you see any errors when using the IP created on one machine on another machine?
03-18-2015 05:01 AM
Can you post the complete error message please?
Do you see this error after creating the IP on new machine?
Are you able to create the IP on the old machine without errors?
03-18-2015 05:23 AM
03-18-2015 08:16 AM
03-18-2015 08:19 AM
Referesh the IP repository and regenerate IP output products.
03-18-2015 09:43 AM