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Explorer
Explorer
31,360 Views
Registered: ‎05-11-2012

IP is locked - Vivado 2014.4 for custom IP

I am trying to convert an EDK Project from Vivado 2013.2 to the latest Vivado 2014.4.  I have the design functioning properly for all IPs that are provided through the Xilinx IP Catalog.  I am now attempting to package and add 3 custom IPs that I have.

 

After I package one of the IPs and add it to my block diagram, I get an error message when I attempt to Validate the design that states:

[BD 41-1179] The following IPs in this design are locked.  This cmmand cannot be run until these IPs are unlocked.  Please run report_ip_status for more details and a recommendation on how to fix this issue.

/custom_IP_1

 

I ran the report_ip_status and the IP status says that the IP definition refers to missing subcores, with a Recommendation of Add IP definition to catalog.  My IP consists of VHDL and Verilog files that are located in various file directories.  When I open the IP in the package editor again, it appears as though the files that I added to the project were never added...which I suspect is the cause of the missing subcores being referred to by the report_ip_status.

 

 

How can I package my custom IP and add it to my design so that it is not locked?

 

Thanks!!

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14 Replies
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Scholar
Scholar
31,352 Views
Registered: ‎11-21-2013

Re: IP is locked - Vivado 2014.4 for custom IP

Usually if you get such a message, it means that the IPs in the directories pointed by the project's IP repository path are newer than the ones used in your project, whether it is because tool upgrade or an individual IP upgrade.

 

For this, report_ip_status followed by "upgrade_ip [get_ips *] " should do the trick (in gui, select the IPs on the bottom window and click 'Update').

 

Hope this helps.

 

Regards

Vlad

Vladislav Muravin
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Explorer
31,350 Views
Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

Thanks Vlad for the response, but the VHDL hasn't changed recently.  I can't run the Upgrade IP since it is not a Xilinx provide IP that would have an upgrade due to migrating from an older Vivado suite.

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Scholar
Scholar
31,346 Views
Registered: ‎11-21-2013

Re: IP is locked - Vivado 2014.4 for custom IP

And these IPs do not contain other Xilinx IPs? What happens if you do the following in the TCL console?
1. report_ip_status (can u paste what this command outputs?)
2. upgrade_ip [get_ips *]

Sometimes VIVADO does very funky stuff and doing these two things help us out. For example, we have been given an early release of one of the cores, which we are still using as we are having issues with the official release of the core. This one always tells us that it is "locked". so we do the above 2 steps for "unlocking" this IP...

Cheers Vlad
Vladislav Muravin
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Explorer
Explorer
31,337 Views
Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

The custom IP contains an ILA IP that can be instatiated in various portions of the custom IP.  I added the ILA IP to the design when I was in the package IP project.

 

The attached .txt files have the output from the 2 TCL commands you asked me to run.

 

Thanks!

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Scholar
Scholar
31,334 Views
Registered: ‎11-21-2013

Re: IP is locked - Vivado 2014.4 for custom IP

Your report_ip_status returned one IP that has been marked for upgrade as per that table. So ideally the upgrade_ip [get_ips *] should have updated all IPs to the latest version. Are you still getting this "locked" message?
Vladislav Muravin
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Explorer
Explorer
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Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

The IP that was marked for an upgrade was my custom IP, which I don't know how it could upgrade.

 

I still have the error message related to the IP being locked after running the upgrad_ip TCL command.

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Scholar
Scholar
31,316 Views
Registered: ‎11-21-2013

Re: IP is locked - Vivado 2014.4 for custom IP

Oh well... then you have the same issue as we do with the unofficial release of one of the Xilinx cores that is constantly locked; at least, you are getting the same message.

Since we do all of this in TCL batch mode, the message has little consequence for us as long as the synthesis is running and the IP revision is the latest. Does your synthesis run though or not? Perhaps Xilinx experts can offer more suggestions.

BR

Vlad

Vladislav Muravin
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Xilinx Employee
Xilinx Employee
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Registered: ‎08-02-2007

Re: IP is locked - Vivado 2014.4 for custom IP

Hi,

 

report_ip_status checks if there is a change in the version of the IP's being used or if there is a change in the device/package that you are targeting. So if the IP has some dependency libraries that might have changed over the versions then you might have to upgrade them.

 

Do attach the project for further analysis.

 

--Hem

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Xilinx Employee
Xilinx Employee
31,290 Views
Registered: ‎09-20-2012

Re: IP is locked - Vivado 2014.4 for custom IP

Hi,

Is your "package ip" project created in vivado 2013.2? I.e., is the ILA ip which is inside your custom ip was created in vivado 2013.2?

If yes the open the ip packager project ( right click on the ip in block design and select "edit in ip packager") and run tools -->report ip status followed by "upgrade ip". After this click on "repackage ip".

Thanks,
Deepika.
Thanks,
Deepika.
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Explorer
Explorer
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Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

I am unable to share the project on here due to the nature of the project.

 

The package IP and the ILA within the custom IP were all done in Vivado 2014.4.  The IP had originally been packaged in 2014.1, but I repackaged it and readded the ILA in 2014.4.

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Explorer
Explorer
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Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

I have not tried running Synthesis because I have not generated the HDL Wrapper for my block diagram, which I am unable to have Vivado automatically do for me since I have the locked IP.

 

I am going to try and manually create the wrapper in order to try and run Synthesis.

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Explorer
Explorer
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Registered: ‎05-11-2012

Re: IP is locked - Vivado 2014.4 for custom IP

Does anyone have any suggestions on how to get the IP to show up as not locked?

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Visitor
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Registered: ‎08-02-2017

Re: IP is locked - Vivado 2014.4 for custom IP


@muravin wrote:

Usually if you get such a message, it means that the IPs in the directories pointed by the project's IP repository path are newer than the ones used in your project, whether it is because tool upgrade or an individual IP upgrade.

 

For this, report_ip_status followed by "upgrade_ip [get_ips *] " should do the trick (in gui, select the IPs on the bottom window and click 'Update').

------------------------------------------------------ 

 

Heck yah. It may be simple but it reminds me that the (tcl) command line can bypass GUI bugs that might be hidden!

"upgrade_ip [get_ips *] " just saved me a headache with a stubborn GUI.

 

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Visitor
Visitor
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Registered: ‎11-12-2018

Re: IP is locked - Vivado 2014.4 for custom IP

I have a similar problem. The messages appeared afer TCL commands are as below:

Vivado CommandsGeneral Messages[filemgmt 56-3] IP Repository Path: Could not find the directory 'f:/PhD Electronic Engineering/Project/Hitachi Reference Files - 20181123-01/RPWsn_EP/MiniZed/Projects/MiniZed_AT86RF215/rtl_master'.
[BD 41-1661] One or more IPs have been locked in the design 'design_1.bd'. Please run report_ip_status for more details and recommendations on how to fix this issue.
List of locked IPs:
design_1_Pmod3_0_0

[IP_Flow 19-2248] Failed to load user IP repository 'f:/PhD Electronic Engineering/Project/Hitachi Reference Files - 20181123-01/RPWsn_EP/MiniZed/Projects/MiniZed_AT86RF215/rtl_master'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
[IP_Flow 19-2248] Failed to load user IP repository 'f:/PhD Electronic Engineering/Project/Hitachi Reference Files - 20181123-01/RPWsn_EP/MiniZed/Projects/MiniZed_AT86RF215/rtl_master'; Can't find the specified path.
If this directory should no longer be in your list of user repositories, go to the IP Settings dialog and remove it.
design_1General Messages[BD 5-352] 'E:/Hitachi Project/Work/design_1.pdf' file does not have write permission.
[BD 5-352] 'E:/Hitachi Project/Work/design_1.pdf' file does not have write permission.
[Coretcl 2-1044] No upgrade is available for 'design_1_Pmod3_0_0'
[Coretcl 2-1042] No IP was identified for upgrade.
[Vivado 12-106] *** Exception: java.lang.NullPointerException (See C:/Users/Zaid Ahmad/AppData/Roaming/Xilinx/Vivado/vivado_pid6556.debug)

In fact I copies the project from on pc to another pc and updated the sources, then updated the repository. Even then the synthesis have stopped.

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