cancel
Showing results for 
Search instead for 
Did you mean: 
Highlighted
Instructor
Instructor
6,103 Views
Registered: ‎07-21-2009

ISE 14.6 Clocking Wizard 3.6 silliness

Running the Clocking Wizard (v3.6) from within ISE 14.6, there is some silliness in the Clocking Wizard.

 

Selections:

  • Frequency synthesis
  • Phase alignment (doesn't matter)
  • Minimise power (doesn't matter)
  • PLL_Base (Spartan-6)
  • Differential input clock capable pin (doesn't matter)

                                  ---------Wizard reported----------

input clock   requested output    "actual"     VCO         input

frequency     clock frequency     clock freq   frequency   frequency

100M            900M               900M         900M        100M

200M            900M               900M         900M        200M

300M            900M               900.090M     900.090M    300.030M

400M            900M               900M         900M        400M

450M            900M               900.090M     900.090M    450.045M

 

Searched for bugs and fixes on the main website, as well as the forums, and did not find anything which describes this problem.  Of course, i may not have searched in the right places with the right search terms...

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
0 Kudos
2 Replies
Highlighted
Xilinx Employee
Xilinx Employee
6,057 Views
Registered: ‎09-20-2012

Re: ISE 14.6 Clocking Wizard 3.6 silliness

Hi Bob,

 

Thanks for bringing this in to our notice.

 

I have found a similar description in internal CR 677921.

 

From the CR, it looks like this issue is fixed in V5.1 version of core (vivado 2013.3 or vivado 2013.4).

 

I have tested this and below are the screenshots from ISE 14.6 and Vivado 2013.4

 

From ISE:

 

Capture1.PNG

 

From vivado:

 

Capture2.PNG

 

Can you check this in V5.1 version of core at your end?

 

Thanks,

Deepika.

Thanks,
Deepika.
--------------------------------------------------------------------------------------------
Google your question before posting. If someone's post answers your question, mark the post as answer with "Accept as solution". If you see a particularly good and informative post, consider giving it Kudos (the star on the left)
0 Kudos
Highlighted
Instructor
Instructor
6,045 Views
Registered: ‎07-21-2009

Re: ISE 14.6 Clocking Wizard 3.6 silliness

From the CR, it looks like this issue is fixed in V5.1 version of core (vivado 2013.3 or vivado 2013.4).

...

Can you check this in V5.1 version of core at your end?

 

Deepika, you should understand that using Vivado is a useful suggestion only for those folks who are targeting device families which are not supported by ISE.  From your answer, it seems that bug fix support for ISE effectively slowed down or halted sometime in early 2013.  The folks who wrote and responded to internal CR 677921 either did not check with the ISE version, or did not bother to fix the ISE version.

 

As a user, there is a sense that many who work at Xilinx believe that the answer to any or all ISE problems is to migrate to Vivado.  This belief cannot be more wrong, as ISE and Vivado serve different and (mostly) separate product lines.  To repeat:  ISE and Vivado are not interchangeable.

 

In the FPGA marketplace, Xilinx has effectively split into two companies with two different sets of product lines, two different development workflows, and two different support levels.

 

It would be helpful to the Xilinx user community if Xilinx issued a policy statement describing what software support, if any, to expect for ISE, going forward.  There is no point in bothering with bug reports for ISE if they will be ignored, except to provide a warning for other users.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.