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Visitor aroturier
Visitor
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Registered: ‎03-18-2019

Impossible to create a VHDL design flow ISE 4.2

Hello,

I start a project with a XC4000 series FPGA and so I have to work with ISE 4.2, the last version available for this FPGA. I installed the software and services packs files related.  

My problem is when i want to create a new project, I can't choose XST VHDL as my design flow, i just have EDIF as you can see on the following picture.

Sans titre.png

I also tried to download the previous version, 4.1. I can select a XST VHDL design flow but this time I can't select the XC4000 FPGA.

I think the problem comes from a bad installation of services packs files but I don't understand why.

Thanks and regards,

Antoine

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